Commits · 36fe5fbdf0b9a477475fbf3a2f2a41b86fae44ce · Projects / SPEC7

31 Aug, 2021 7 commits
- repair vuart wr peripheral interconnect base address (spec7 g_ram_address_space_size_kb => 256) · 36fe5fbd
  Peter Jansweijer authored Aug 31, 2021
  
  36fe5fbd
- remove unused spec7_golden_image. Tandem PROM stage 1: spec7_tandem_boot, stage 2: spec7_ref_design · 8d25772f
  Peter Jansweijer authored Aug 31, 2021
  
  8d25772f
- remove deprecated petalinux project · 666a6346
  Peter Jansweijer authored Aug 31, 2021
  
  666a6346
- renamed spec7-sw to spec7-tools · 3588acb2
  Peter Jansweijer authored Aug 31, 2021
  
  3588acb2
- Moved, vuart and SMBusreset scripts · 380867e5
  Peter Jansweijer authored Aug 31, 2021
  
  380867e5
- copied processing_system_pcie.bd and created ps_pcie.bd with same processing… · 5d456357
  Peter Jansweijer authored Aug 19, 2021
```
copied processing_system_pcie.bd and created ps_pcie.bd with same processing system footprint as ps_pci_tandem.bd
```
  5d456357
- add fsbl build commands · 8301e5b3
  Peter Jansweijer authored Jul 08, 2021
  
  8301e5b3
07 Jul, 2021 1 commit
- add export hardware xsa file generation to scripts · b8c9f759
  Peter Jansweijer authored Jul 07, 2021
  
  b8c9f759
05 Jul, 2021 1 commit
- Merge remote-tracking branch 'remotes/origin/jdgarcia_pcie_gw_upgrade' into proposed_master · cba3ebb3
  Peter Jansweijer authored Jul 05, 2021
  
  cba3ebb3
04 Jul, 2021 1 commit
- Change Tandem Boot BD name to shorten the resulting paths and avoid Windows crashes · 50a05ff6
  Javier D. Garcia-Lasheras authored Jul 04, 2021
  
  50a05ff6
30 Jun, 2021 7 commits
- Adjust .gitlab-ci.yml to new directory structure, viv_do_all leaves .bit, .mmi… · a612dd92
  Peter Jansweijer authored Jun 30, 2021
```
Adjust .gitlab-ci.yml to new directory structure, viv_do_all leaves .bit, .mmi and .log files in directory work
```
  a612dd92
- .gitlab-ci.yml added to the project · 07ad4910
  kblantos authored Jun 16, 2021
  
  07ad4910
- removed ltc9516_test_clbv4 design · af9cd38f
  Peter Jansweijer authored Jun 28, 2021
  
  af9cd38f
- adjust main script for designs without mmi and pps_in · 4d82e298
  Peter Jansweijer authored Jun 28, 2021
  
  4d82e298
- reorganize and directory structure for spec7_blink design · 943d58b1
  Peter Jansweijer authored Jun 28, 2021
  
  943d58b1
- removed old directory structure spec7_ref_design · 77897d56
  Peter Jansweijer authored Jun 28, 2021
  
  77897d56
- move spec7_ref_design simulation directory · 12c440cd
  Peter Jansweijer authored Jun 28, 2021
  
  12c440cd
27 Jun, 2021 3 commits
- Add userspace tools for SPEC7, derived from the original SPEC ones · 846774b8
  Javier D. Garcia-Lasheras authored Jun 27, 2021
  
  846774b8
- Add SPEC7 PCIe Tandem Boot auxiliary design · e2992685
  Javier D. Garcia-Lasheras authored Jun 27, 2021
  
  e2992685
- ps7_uart_1 connected to XDMA AXI Lite and XDMA AXI Bypass access to PS DDR · c2053a22
  Javier D. Garcia-Lasheras authored Jun 27, 2021
  
  c2053a22
25 Jun, 2021 1 commit
- remove even_odd_det, add bufg for clk_ref62m5 · 7ab6647e
  Peter Jansweijer authored Jun 25, 2021
  
  7ab6647e
17 Jun, 2021 3 commits
- update precompiled software · a0cbb7b4
  Peter Jansweijer authored Jun 17, 2021
  
  a0cbb7b4
- repair phy logic driven by gtx clock · 005188f2
  Peter Jansweijer authored Jun 16, 2021
  
  005188f2
- moved spec7 files from wr-cores up to spec7.git · 65913abe
  Peter Jansweijer authored Jun 15, 2021
  
  65913abe
08 Jun, 2021 1 commit
- updated precompiled wrpc-sw-v5_spec7 · 90697cb8
  Peter Jansweijer authored Jun 08, 2021
  
  90697cb8
01 Jun, 2021 3 commits
- Added license header to script files · 2153ceb1
  Peter Jansweijer authored Jun 01, 2021
  
  2153ceb1
- Merge remote-tracking branch 'remotes/origin/peter_210601' into proposed_master · 93fd5218
  Peter Jansweijer authored Jun 01, 2021
  
  93fd5218
- move spec7 specific processing_system_pcie.bd · a51dea55
  Peter Jansweijer authored Jun 01, 2021
  
  a51dea55
06 Apr, 2021 1 commit
- Choose REFerence of HPSEC design XDC file based in $spec7_design · b3af795e
  Peter Jansweijer authored Mar 24, 2021
  
  b3af795e
24 Mar, 2021 1 commit
- harmonize design names (use HPSEC instead of WRITE) · 4d759f27
  Peter Jansweijer authored Mar 24, 2021
  
  4d759f27
22 Oct, 2020 1 commit
- added design, device and pps status to log file · d9e7fdf8
  Peter Jansweijer authored Oct 22, 2020
  
  d9e7fdf8
07 Oct, 2020 3 commits
- add precompiled wrpc-sw files wrc_v5_spec7 · 12a00f8d
  Peter Jansweijer authored Oct 07, 2020
  
  12a00f8d
- removed spec7_write_design (now incorporated in spec7_ref_design) · 42268ae6
  Peter Jansweijer authored Oct 06, 2020
  
  42268ae6
- Merged reference and write design; now both in a single spec7_ref_design · dc9c439f
  Peter Jansweijer authored Oct 06, 2020
  
  dc9c439f
22 Sep, 2020 1 commit
- added PS in ref design, adjusted BAR addresses. · f11846a0
  Pascal Bos authored Sep 07, 2020
  
  f11846a0
21 Sep, 2020 3 commits
- Update sw/mm/spec7_mm.py · 0492a2df
  Ton Damen authored Sep 07, 2020
  
  0492a2df
- Update sw/vuart/spec7_vuart.py · 968517cd
  Ton Damen authored Sep 07, 2020
  
  968517cd
- wr-cores: repaired pll_clk_sel_o being inverted, repaired txts_o clock domain · 9937dc8e
  Peter Jansweijer authored Sep 21, 2020
  
  9937dc8e
14 Sep, 2020 1 commit
- added PS in ref design, adjusted BAR addresses. · 9bfc68d0
  Pascal Bos authored Sep 07, 2020
  
  9bfc68d0
31 Aug, 2020 1 commit

Add even_odd detector. Detect the alignment of 10MHz and 125MHz at the first… · 98bb01ed

Peter Jansweijer authored Aug 19, 2020

Add even_odd detector. Detect the alignment of 10MHz and 125MHz at the first 10MHz edge after PPS-in. Software reset the LTC6950 when misaligned.

98bb01ed