The High Performance WR Receiver module is an MTCA eRTM (slots 14-15) WR receiver with redundant uplinks, providing a variety of ultra-low jitter clock signals.

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Mock Turtle is an HDL core of a generic control system node, based on a deterministic multicore CPU architecture. Mock Turtle can use White Rabbit as the means of communication and synchronization in a distributed system. More info at the Wiki page

A project devoted to developing and discussing the CERN Open Hardware Licence. More info at the Wiki page

A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.

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