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This project covers the hardware development of version 4 of the White Rabbit switch (WRS-v4). More info at the Wiki page

SAMD21-based monitoring module for DI/OT power supply and fan tray.

Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page

This project defines data structures, to be embedded in the FPGA memory address space, to enumerate the devices that have been synthetized in the current design. The same structure is also used as a simple flash file system. AKA Self-Describing Bus (SDB) Specification for Logic Cores. The layout is simple enough to be parsed both by the host and by the internal soft-core, if any.

The documentation is public, and related code is GNU GPL licensed.

A board that has eyes

A fine delay generator in FMC format with 1 input and 4 outputs. The resolution is 1 ns. Commercially available. More info at the Wiki page

An FPGA Mezzanine Card (FMC) with a Time to Digital Converter chip to perform one-shot sub-nanosecond time interval measurements. Commercially available. More info at the Wiki page

This project contains all the HDL gateware necessary for the FPGA of the WR switch.

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

This project hosts compliance tests dedicated for WR devices and based on the ATTEST framework available from Veryx Technologies. To use the material available in this project, the ATTEST framework needs to be purchased.

Distributed I/O Tier - these are electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus. These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations. More info at the Wiki page

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page

DIOT 3U crate mechanics and backplane compliant with CompactPCI-Serial standard.

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

BabyWR is a general purpose small pluggable WR node in a M.2 form-factor. More info at the Wiki page

The P4CH–LNLS is a standalone, high-resolution, four-channel picoammeter. The channels are independent; each features an eight-range transimpedance amplifier (I-V amplifier) and 24-bit resolution, delta-sigma ADC with ten selectable sampling frequencies that reach up to 2000 samples per second. The hardware’s input stage was designed to be biased up to 400 V by an external high-voltage power supply. Edge-sensitive trigger signals allow for synchronization of data acquisition with external events or other devices. Input and output ADC clock connectors are also available on the device, which may be beneficial for applications requiring multiple and synchronized P4CH-LNLS with strict timing requirements. NXP Semiconductors’ cortex M3 microcontroller, the LPC1768, manages these features and stores the calibration data on an external EEPROM. The microcontroller and the user communicate through a 10/100 Mbps Ethernet link.