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SPEC7
Commits
50a05ff6
Commit
50a05ff6
authored
Jul 04, 2021
by
Javier D. Garcia-Lasheras
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Change Tandem Boot BD name to shorten the resulting paths and avoid Windows crashes
parent
846774b8
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3 changed files
with
11 additions
and
11 deletions
+11
-11
ps_pci_tandem.bd
hdl/ip/ps_pci_tandem.bd
+7
-7
proj_file_list.txt
hdl/syn/spec7_tandem_boot/proj_file_list.txt
+1
-1
spec7_tandem_boot_top.vhd
hdl/top/spec7_tandem_boot/spec7_tandem_boot_top.vhd
+3
-3
No files found.
hdl/ip/p
rocessing_system_pcie_tandem_boot
.bd
→
hdl/ip/p
s_pci_tandem
.bd
View file @
50a05ff6
...
...
@@ -3,7 +3,7 @@
"design_info": {
"boundary_crc": "0xE176D980E11BED4F",
"device": "xc7z035fbg676-1",
"name": "p
rocessing_system_pcie_tandem_boot
",
"name": "p
s_pci_tandem
",
"synth_flow_mode": "Hierarchical",
"tool_version": "2019.2",
"validated": "true"
...
...
@@ -88,7 +88,7 @@
"right": "0",
"parameters": {
"CLK_DOMAIN": {
"value": "p
rocessing_system_pcie_tandem_boot
_pci_clk_n",
"value": "p
s_pci_tandem
_pci_clk_n",
"value_src": "default"
},
"FREQ_HZ": {
...
...
@@ -112,7 +112,7 @@
"right": "0",
"parameters": {
"CLK_DOMAIN": {
"value": "p
rocessing_system_pcie_tandem_boot
_pci_clk_p",
"value": "p
s_pci_tandem
_pci_clk_p",
"value_src": "default"
},
"FREQ_HZ": {
...
...
@@ -167,7 +167,7 @@
"components": {
"pcie_7x": {
"vlnv": "xilinx.com:ip:pcie_7x:3.3",
"xci_name": "p
rocessing_system_pcie_tandem_boot
_pcie_7x_0",
"xci_name": "p
s_pci_tandem
_pcie_7x_0",
"parameters": {
"Bar0_64bit": {
"value": "true"
...
...
@@ -296,7 +296,7 @@
},
"ps7": {
"vlnv": "xilinx.com:ip:processing_system7:5.5",
"xci_name": "p
rocessing_system_pcie_tandem_boot
_ps7_0",
"xci_name": "p
s_pci_tandem
_ps7_0",
"parameters": {
"PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
"value": "666.666687"
...
...
@@ -1139,7 +1139,7 @@
},
"util_ds_buf_0": {
"vlnv": "xilinx.com:ip:util_ds_buf:2.1",
"xci_name": "p
rocessing_system_pcie_tandem_boot
_util_ds_buf_0_0",
"xci_name": "p
s_pci_tandem
_util_ds_buf_0_0",
"parameters": {
"C_BUF_TYPE": {
"value": "IBUFDSGTE"
...
...
@@ -1148,7 +1148,7 @@
},
"xlconstant_0": {
"vlnv": "xilinx.com:ip:xlconstant:1.1",
"xci_name": "p
rocessing_system_pcie_tandem_boot
_xlconstant_0_0",
"xci_name": "p
s_pci_tandem
_xlconstant_0_0",
"parameters": {
"CONST_VAL": {
"value": "0"
...
...
hdl/syn/spec7_tandem_boot/proj_file_list.txt
View file @
50a05ff6
...
...
@@ -5,7 +5,7 @@
../../top/spec7_tandem_boot/spec7_tandem_boot_top.xdc
# bmm not supported by hdlmake? Need to add it manually...
../../ip/p
rocessing_system_pcie_tandem_boot
.bd
../../ip/p
s_pci_tandem
.bd
# include hardware version ID un FPGA USER_ID register:
hdl_version.xdc
hdl/top/spec7_tandem_boot/spec7_tandem_boot_top.vhd
View file @
50a05ff6
...
...
@@ -82,7 +82,7 @@ entity spec7_tandem_boot_top is
end
spec7_tandem_boot_top
;
architecture
STRUCTURE
of
spec7_tandem_boot_top
is
component
p
rocessing_system_pcie_tandem_boot
_wrapper
is
component
p
s_pci_tandem
_wrapper
is
port
(
pci_clk_n
:
in
STD_LOGIC_VECTOR
(
0
to
0
);
pci_clk_p
:
in
STD_LOGIC_VECTOR
(
0
to
0
);
...
...
@@ -113,9 +113,9 @@ architecture STRUCTURE of spec7_tandem_boot_top is
FIXED_IO_ps_clk
:
inout
STD_LOGIC
;
FIXED_IO_ps_porb
:
inout
STD_LOGIC
);
end
component
p
rocessing_system_pcie_tandem_boot
_wrapper
;
end
component
p
s_pci_tandem
_wrapper
;
begin
p
rocessing_system_pcie_tandem_boot_wrapper_i
:
component
processing_system_pcie_tandem_boot
_wrapper
p
s_pci_tandem_wrapper_i
:
component
ps_pci_tandem
_wrapper
port
map
(
DDR_addr
(
14
downto
0
)
=>
DDR_addr
(
14
downto
0
),
DDR_ba
(
2
downto
0
)
=>
DDR_ba
(
2
downto
0
),
...
...
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