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SPEC7
Commit 42268ae6 authored by Peter Jansweijer's avatar Peter Jansweijer
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removed spec7_write_design (now incorporated in spec7_ref_design)

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hdl/spec7_write_design/sim/.gitignore deleted 100644 → 0
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/spec7_write.lib
/*.bram
/*.mem
/*.bak
/*.wlf
/*.vstf
/*.lnk
/*.jou
/*.log
/transcript
\ No newline at end of file
hdl/spec7_write_design/sim/VSim_Functional.tcl deleted 100644 → 0
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set Simulation TRUE
if {$Simulation} {
puts "Note: Simulation"
set g_simulation 1
} else {
puts "Note: Synthesis"
set g_simulation 0
}
source ../../../sw/scripts/VSim_Current_Revision.tcl
puts "elf file used for lm32 in WRPC: [set elf_file_lm32_wrpc "..\\..\\..\\sw\\precompiled\\wrps-sw_v4_2_KPx5\\wrc.elf"]"
set lm32_wrpc_instpath "lm32_wrpc_memory"
# !!! Note !!!: Don't forget to compile the software (elf file) for simulation (avoid printf etc. to speed up simulation time)
# !!! Note !!!: The double \\ are there since the DOS command below needs backslashes and a single backslash is seen as a switch in tcl
# Generate a "lm32_memory.mem" file from the "elf" file content
exec cmd.exe /c updatemem -meminfo spec7_write_top.smi -data $elf_file_lm32_wrpc -proc $lm32_wrpc_instpath -force
# Convert the "mem" to a "bram" (a format used by the White Rabbit "memory_loader_pkg.vhd")
do ../../../sw/scripts/mem2bram.tcl lm32_wrpc_memory 131072
# Now a fresh "lm32_wrpc_memory.bram" is in place for simulation and is loaded into xwb_dpram
# Note that -novopt causes No Optimization (some internal signals might get non-vivible by optimization)
# Note that "-L unisim" is needed to find the primitive "BSCANE2" thta is instantiated in "$LM32_Sources/platform/kintex7/jtag_tap.v "
#suppress warning Warning: (vsim-151) NUMERIC_STD.TO_INTEGER: Value <> is not in bounds of NATURAL.
#suppress warning Warning: (vsim-8684) No drivers exist on out port <blabla>
#vsim -G/spec7_write_top/g_simulation=$g_simulation -G/spec7_write_top/g_dpram_initf=lm32_wrpc_memory.bram -t ps -L unisim -lib work work.spec7_write_top
# -novopt is now deprecated
#vsim -voptargs="+acc" -novopt
# Note that -novopt can cause errors like:
# "Error: (vsim-8346) .../blabla.vhd(516): VHDL component port was not found because Verilog port 'D_ACK_I' was mapped to the extended identifier '\D_ACK_I\'."
# "Error: (vsim-3935) .../blabla.vhd(177): Port 'I_CYC_O' not found in the connected module."
vsim -voptargs="+acc=lnprv" \
-G/spec7_write_top/g_simulation=$g_simulation \
-G/spec7_write_top/g_use_pps_in_single=False \
-G/spec7_write_top/g_dpram_initf=lm32_wrpc_memory.bram \
-t ps -L unisim -lib work work.spec7_write_top
do wave.tcl
do test.tcl
view signals
run 100 us
#stop
#wave zoom full
#
# End
#
hdl/spec7_write_design/sim/modelsim.ini deleted 100644 → 0
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hdl/spec7_write_design/sim/spec7_write_top.smi deleted 100644 → 0
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<?xml version="1.0" encoding="UTF-8"?>
<MemInfoSimulation Version="1" Minor="1">
<Processor Endianness="Big" InstPath="lm32_wrpc_memory">
<AddressSpace Name="lm32_wrpc_memory_dpram" ECC="NONE" Begin="0" End="131071">
<BusBlock>
<BitLane MemType="lm32_wrpc_memory_dpram" MemType_DataWidth="32" MemType_AddressDepth="131071">
<DataWidth MSB="31" LSB="0"/>
<AddressRange Begin="0" End="32767"/>
<Parity ON="false" NumBits="0"/>
<MemFile Name="lm32_wrpc_memory.mem"/>
</BitLane>
</BusBlock>
</AddressSpace>
</Processor>
<Config>
<Option Name="Part" Val="xc7k160tfbg676-2"/>
</Config>
<DRC>
<Rule Name="RDADDRCHANGE" Val="false"/>
</DRC>
</MemInfoSimulation>
hdl/spec7_write_design/sim/vlog.opt deleted 100644 → 0
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+incdir+../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_lm32/platform/generic
+incdir+../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_lm32/src
+incdir+../../wr-cores/ip_cores/general-cores/modules/wishbone/wb_spi
hdl/spec7_write_design/syn/.gitignore deleted 100644 → 0
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/.Xil
/work
/*.bak
/*.jou
/*.log
/*.prm
/*.mcs
/*.bin
/*.bit
/spec7_write_top_bd.bmm
/revisiondate_log.txt
/hdl_version.xdc
hdl/spec7_write_design/syn/README.TXT deleted 100644 → 0
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Synthesis and Place&Route README.TXT January 25, 2018
--------------------------------------------------------
Scripts:
--------
1) do_vivado.cmd start vivado (calling viv_do_all.tcl)
2) do_vivado_tcl.cmd start vivado tcl console.
You may want to type:
a) "start_gui" to start the vivado gui
b) "source proj_properties.tcl" to find the path to the scripts and next
"source $script_dir/viv_do_all.tcl"
3) do_elf.cmd combines the software and the empty "%DesName%.bit" file. Uses "software.elf", "%DesName%.bit"
and "%DesName%_bd.bmm" and merges them into "%DesName%_elf.bit"
4) do_vivado_prog.cmd download the configuration ("%DesName%_elf.bit") into the Evaluation board via the USB
download cable.
Project info and sources:
--------
proj_properties.tcl contains the project properties (name, device etc.)
proj_file_list.txt a text file with all project sources. Remember that the wr-cores files are listed
using "hdlmake list-files > proj_file_list.txt" in
directory "../../wr-cores/syn/clbv3_ref_design"
Scripts that are called by the scripts above or can be executed separately on the tcl command line:
--------
viv_do_synt.tcl sourced by viv_do_all.tcl, starts vivado synthesis run
viv_do_impl.tcl sourced by viv_do_all.tcl, starts vivado implementation run
viv_do_program.tcl sourced by do_vivado_prog.cmd
hdl/spec7_write_design/syn/do_vivado.cmd deleted 100644 → 0
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rem do_vivado.cmd PeterJ, 19-Jan-2018.
@prompt $$$s
rem ### Cleanup old log files and stuff
del *.log
del *.jou
rem ### note that environment variable "VIVADO" must be set to something like "E:\Xilinx\Vivado\2017.1\bin\"
rem ### in your (User) Environment Variables
"%VIVADO%\vivado.bat" -mode batch -source ..\..\..\sw\scripts\viv_do_all.tcl
hdl/spec7_write_design/syn/do_vivado_gen_bin_mcs.cmd deleted 100644 → 0
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rem prog.cmd PeterJ, 23-JUl-2018.
@prompt $$$s
rem ### Clean up old log files and stuff
del vivado_gen_bin_mcs.log
rem ### note that environment variable "VIVADO" must be set to something like "E:\Xilinx\Vivado\2017.1\bin\"
rem ### in your (User) Environment Variables
"%VIVADO%\vivado.bat" -mode batch -source ..\..\..\sw\scripts\viv_gen_bin_mcs.tcl -log vivado_gen_bin_mcs.log
hdl/spec7_write_design/syn/do_vivado_prog.cmd deleted 100644 → 0
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rem prog.cmd PeterJ, 23-Jan-2018.
@prompt $$$s
rem ### Cleanup old log files and stuff
del vivado_prog.log
rem ### note that environment variable "VIVADO" must be set to something like "E:\Xilinx\Vivado\2017.1\bin\"
rem ### in your (User) Environment Variables
"%VIVADO%\vivado.bat" -mode batch -source ..\..\..\sw\scripts\viv_do_program.tcl -log vivado_prog.log
hdl/spec7_write_design/syn/do_vivado_tcl.cmd deleted 100644 → 0
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rem do_vivado_tcl.cmd PeterJ, 19-Jan-2018.
@prompt $$$s
rem ### Usually one wants to start Vivado in tcl mode to inspect an existing design,
rem ### therefore don't delete log files and setting. Else remove "rem" statements in the lines below.
rem set DesName=clbv3_wr_ref_top
rem set LogName=%DesName%-vivado
rem ### Cleanup old log files and stuff (
rem del vivado*.log
rem del vivado*.jou
rem ### note that environment variable "VIVADO" must be set to something like "E:\Xilinx\Vivado\2017.1\bin\"
rem ### in your (User) Environment Variables
"%VIVADO%\vivado.bat" -mode tcl
hdl/spec7_write_design/syn/proj_file_list.txt deleted 100644 → 0
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hdl/spec7_write_design/syn/proj_properties.tcl deleted 100644 → 0
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#
# projetc_properties.tcl
# This file contains the general project properties such as the project name and
# the directory where Vivado is doing it's job
#
set proj_name spec7_write_top
set proj_dir work
set script_dir [pwd]/../../../sw/scripts
set lm32_wrpc_initf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.bram
set lm32_wrpc_elf [pwd]/../../../sw/precompiled/wrps-sw_spec7/wrc.elf
set lm32_wrpc_instpath "lm32_wrpc_memory"
set g_use_pps_in_single FALSE
# Translate True/False into boolean values 1'b1, 1'b0, that are accepted by Vivado
if {$g_use_pps_in_single} {
set g_use_pps_in_single 1'b1
} else {
set g_use_pps_in_single 1'b0
}
# update revision except when argument "no_update_revison" is passed (as for example by viv_do_programm.tcl)
if {$argc == 0 || $argv != "no_update_revision"} {
source $script_dir/revisiondate.tcl
set generics "g_dpram_initf=$lm32_wrpc_initf \
g_use_pps_in_single=$g_use_pps_in_single"
}
# SPEC7 equipped with ZYNQ XC7Z035FBG676-1 (speed grade -1 has lowest performance)
set device xc7z035fbg676-1
#set device xc7z030fbg676-1
hdl/spec7_write_design/syn/revisiondate.tcl deleted 100644 → 0
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###############################################################################
# revisiondate.tcl 08-Dec-2006
# Calculate Current Date
set current_year [clock format [clock seconds] -format %y]
scan $current_year %d current_year
set current_year_h [expr ($current_year / 10)]
set current_year_l [expr ($current_year - 10 * $current_year_h)]
set current_month [clock format [clock seconds] -format %m]
scan $current_month %d current_month
set current_month_h [expr ($current_month / 10)]
set current_month_l [expr ($current_month - 10 * $current_month_h)]
set current_day [clock format [clock seconds] -format %d]
scan $current_day %d current_day
set current_day_h [expr ($current_day / 10)]
set current_day_l [expr ($current_day - 10 * $current_day_h)]
set current_date [expr (1048576*$current_year_h + 65536*$current_year_l + 4096*$current_month_h + 256*$current_month_l + 16*$current_day_h + $current_day_l)]
# Calculate Current Revision
set revision_log_file "revisiondate_log.txt"
set current_rev_date [clock format [clock seconds] -format %y%m%d]
if [file exists $revision_log_file] {
set revision_log_fileptr [open $revision_log_file]
gets $revision_log_fileptr revision_log_date
gets $revision_log_fileptr revision_log_revnumber
close $revision_log_fileptr
if { [string compare $current_rev_date $revision_log_date] == 0 } {
# Dates are equal
set current_revision [expr ($revision_log_revnumber + 1)]
} else {
# Dates are unequal
set current_revision 0
}
set revision_log_fileptr [open $revision_log_file w]
puts $revision_log_fileptr $current_rev_date
puts $revision_log_fileptr $current_revision
close $revision_log_fileptr
} else {
puts "WARNING $revision_log_file not found. Creating new one..."
set current_revision 0
set revision_log_fileptr [open $revision_log_file w]
puts $revision_log_fileptr $current_rev_date
puts $revision_log_fileptr $current_revision
close $revision_log_fileptr
}
puts "###### Synthesis is done with the following settings:"
puts [format "###### DATE: %x" $current_date]
puts [format "###### REVISION: %d" $current_revision]
###############################################################################
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