S

SPEC7

A simple 4-lane PCIe carrier for a FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. More info at the Wiki page

Project ID: 10952
  • Pascal Bos's avatar
    Ready for master. · cbaff7e9
    Pascal Bos authored
    doc: Restructured Documentation
    
    Updated README
    
    
    Updated gitignore
    cbaff7e9
Name
Last commit
Last update
doc Loading commit data...
hdl Loading commit data...
hw Loading commit data...
sw Loading commit data...
.gitignore Loading commit data...
.gitlab-ci.yml Loading commit data...
.gitmodules Loading commit data...
README.md Loading commit data...