Commits · 8305d1d1d6bf7d6318cb1e01b423e289384838ae · white-rabbit / wr-switch-hdl

13 Apr, 2012 1 commit

swcore: first working swcore with resource_management (needs debugging, simple… · 8305d1d1

Maciej Lipinski authored Apr 13, 2012

swcore: first working swcore with resource_management (needs debugging, simple case tested only), output needs resource_management implementation

8305d1d1

03 Apr, 2012 1 commit
- swcore: added preliminary resource_management handling to input_block · d8e1cd47
  Maciej Lipinski authored Apr 03, 2012
  
  d8e1cd47
02 Apr, 2012 1 commit
- swcore: added resource manager, handling in input_block not implemented yet · d19e76c3
  Maciej Lipinski authored Apr 02, 2012
  
  d19e76c3
29 Mar, 2012 2 commits
- swcore: added come comments to the new alloc · 68b4150b
  Maciej Lipinski authored Mar 29, 2012
  
  68b4150b
- testbench/swcore/allocator: un-commented VIAllocatorPort definition causing compilation errors · e466e7f5
  Tomasz Wlostowski authored Mar 29, 2012
  
  e466e7f5
26 Mar, 2012 6 commits
- wrsw_rt_subsystem: removed non-existend generic assignment from wr_softpll_ng instance · 8fa00320
  Tomasz Wlostowski authored Mar 26, 2012
  
  8fa00320
- wr_softpll_ng: cleaned up, added comments · 3abab680
  Tomasz Wlostowski authored Mar 26, 2012
  
  3abab680
- top levels: added minibackplane I2C controllers · 06371339
  Tomasz Wlostowski authored Mar 26, 2012
  
  06371339
- modules/wrsw_swcore: removed obsolete files · 4e67ab38
  Tomasz Wlostowski authored Mar 26, 2012
  
  4e67ab38
- syn: updated .gitignore to filter out all ISE stuff · 05efcd1e
  Tomasz Wlostowski authored Mar 26, 2012
  
  05efcd1e
- top levels/synthesis dirs: cleaned up 6-ports 'test' minibackplane directories · 9b9842e8
  Tomasz Wlostowski authored Mar 26, 2012
  
  9b9842e8
19 Mar, 2012 6 commits
- testbench/swcore: wip · 68596931
  Tomasz Wlostowski authored Mar 19, 2012
  
  68596931
- swcore: fixed RAM models in the manifest · 88ba9054
  Tomasz Wlostowski authored Mar 19, 2012
  
  88ba9054
- swcore: removed some tap signals from across hierarchy · e4aacc4d
  Tomasz Wlostowski authored Mar 19, 2012
  
  e4aacc4d
- swcore: new allocator with bug-free RAM · c8010652
  Tomasz Wlostowski authored Mar 19, 2012
  
  c8010652
- swcore: old allocator with fixed RAM models · 6933ea22
  Tomasz Wlostowski authored Mar 19, 2012
  
  6933ea22
- swcore: removed unnecessary files · c2408157
  Tomasz Wlostowski authored Mar 19, 2012
  
  c2408157
18 Mar, 2012 4 commits
- new allocator · ed6aeb40
  Tomasz Wlostowski authored Mar 18, 2012
  
  ed6aeb40
- swcore: Xilinx RAM model with read-after-write workaround · 58d24af2
  Tomasz Wlostowski authored Mar 18, 2012
  
  58d24af2
- applied stash · 747d1744
  Tomasz Wlostowski authored Mar 18, 2012
  
  747d1744
- testbench/swcore: allocator TB · 39b09dbc
  Tomasz Wlostowski authored Mar 18, 2012
  
  39b09dbc
16 Mar, 2012 8 commits
- modules/wrsw_txtsu: added support for invalid timestamp indication · 064fd70e
  Tomasz Wlostowski authored Mar 16, 2012
  
  064fd70e
- modules/wrsw_swcore: added cross-hierarchy chipscope probes · f3c3994c
  Tomasz Wlostowski authored Mar 16, 2012
  
  f3c3994c
- modules/wrsw_swcore/mpm: mpm_async_fifo: added extra gray counter sync stage to… · 2cf7a47b
  Tomasz Wlostowski authored Mar 16, 2012
```
modules/wrsw_swcore/mpm: mpm_async_fifo: added extra gray counter sync stage to prevent (rather improbable) metastability
```
  2cf7a47b
- modules/wrsw_nic: support for invalid timestamp indication · 97e035f9
  Tomasz Wlostowski authored Mar 16, 2012
  
  97e035f9
- swcore: temp bugfix · f2de0510
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  f2de0510
- swcore: changed the order of writting Linked List entry (now we first clear the… · f98c6575
  Maciej Lipinski authored Mar 16, 2012
```
swcore: changed the order of writting Linked List entry (now we first clear the next page, if available, then we write the current page(address of the next/size))
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  f98c6575
- swcore: output_block ram input signales registered · 38157760
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  38157760
- swcore: Linked List's ram input signales registered · 56a0f09a
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  56a0f09a
15 Mar, 2012 5 commits
- swcore: beautifulized i/o block sources · 358ff7a5
  Tomasz Wlostowski authored Mar 15, 2012
  
  358ff7a5
- modules/wrsw_swcore/xswc_input_block.vhd: added ChipScope tap output · a41240fb
  Tomasz Wlostowski authored Mar 15, 2012
  
  a41240fb
- swcore: bugfix: lossing rtu decisions in case of very short stuck input · 2dfa0b8e
  Maciej Lipinski authored Mar 15, 2012
  
  2dfa0b8e
- swcore: bug with lossing rtu decisions in case of stuck input · 676c5b4a
  Maciej Lipinski authored Mar 14, 2012
  
  676c5b4a
- swcore: input block free-force deallocation bugfix · 19db0a4f
  Maciej Lipinski authored Mar 13, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  19db0a4f
13 Mar, 2012 6 commits
- rt/softpll-ng.c: code snapshot correctly compiling · 9376f7e9
  Tomasz Wlostowski authored Mar 13, 2012
  
  9376f7e9
- top/scb_6ports: new swcore and I2C master for mini-backplane · ceb1897b
  Tomasz Wlostowski authored Mar 13, 2012
  
  ceb1897b
- wrsw_top_pkg.vhd: updated components · c34c4cc5
  Tomasz Wlostowski authored Mar 13, 2012
  
  c34c4cc5
- scb_top_sim.vhd: propagated AUX clock through the module to the real top · 86d7a691
  Tomasz Wlostowski authored Mar 13, 2012
  
  86d7a691
- scb_top_bare.vhd: added I2C and new Swcore · c2920898
  Tomasz Wlostowski authored Mar 13, 2012
  
  c2920898
- simulation models: RTU model with indirect PCRx register addressing · b4f676f9
  Tomasz Wlostowski authored Mar 13, 2012
  
  b4f676f9