Commits · 0dabc07e178283d6f760586b1e8527ffddee035d · Projects / Platform-independent core collection

22 Oct, 2019 9 commits
- rename LICENSE · 0dabc07e
  Federico Vaga authored Oct 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  0dabc07e
- do not use any special license for Makefile/Kbuild · fcaffa59
  Federico Vaga authored Oct 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  fcaffa59
- [sw] install dkms sources · 46f47e71
  Federico Vaga authored Oct 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  46f47e71
- [sw] add dkms config file · 9e8d5333
  Federico Vaga authored Oct 22, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  9e8d5333
- init changelog for first release · 435694d8
  Dimitris Lampridis authored Oct 21, 2019
  
  435694d8
- [sw] improve driver installation · 25295f32
  Federico Vaga authored Oct 21, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  25295f32
- add GPL-2.0 license · 0b6030b4
  Federico Vaga authored Oct 21, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  0b6030b4
- add almost empty CHANGELOG · 923690ac
  Federico Vaga authored Oct 21, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  923690ac
- [ci] add basic CI for drivers · d6c5bfd8
  Federico Vaga authored Oct 21, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  d6c5bfd8
14 Oct, 2019 2 commits
- sw: add SPDX information · 4f414ece
  Federico Vaga authored Oct 14, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  4f414ece
- sw: add modules_install target on Makefiles · 5ba6c68d
  Federico Vaga authored Oct 14, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5ba6c68d
08 Oct, 2019 2 commits
- sw: align Makefiles · 7b03c14c
  Federico Vaga authored Oct 08, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7b03c14c
- import htvic 1.3.0 · 0b27a3f7
  Federico Vaga authored Oct 08, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  0b27a3f7
27 Sep, 2019 2 commits
- sw: include header files · 62f22c5f
  Federico Vaga authored Sep 27, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  62f22c5f
- sw:i2c: unselecting is superfluous · eea86f41
  Federico Vaga authored Sep 27, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  eea86f41
19 Sep, 2019 1 commit
- sw:drv:spi: fix pending test · f90e7c1d
  Federico Vaga authored Sep 19, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f90e7c1d
11 Sep, 2019 1 commit
- sw: improve build system · 96728bc0
  Federico Vaga authored Sep 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  96728bc0
10 Sep, 2019 3 commits
- sw:drv: add SPI driver for spi-ocores · 5d1a20d3
  Federico Vaga authored Sep 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5d1a20d3
- sw:drv:i2c: fix directory name · 44fcfbb5
  Federico Vaga authored Sep 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  44fcfbb5
- sw:drv: add I2C driver from Linux · 58c20ccd
  Federico Vaga authored Sep 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  58c20ccd
09 Sep, 2019 1 commit
- Clean-up non-ASCII characters and fix line feeds and terminations in all affected files · fa8df2bb
  Dimitris Lampridis authored Sep 09, 2019
  
  fa8df2bb
07 Aug, 2019 3 commits
- [hdl] allow general-cores modules to work with hdlmake even when 'target' is not set · 284373b7
  Dimitris Lampridis authored Aug 07, 2019
  
  284373b7
- [tools] update syndate field of buildinfo to include synthesis time as well · 116a9bf8
  Dimitris Lampridis authored Aug 07, 2019
  
  116a9bf8
- [hdl][vic] do not mask RISR register. Closes #4 · 1b74c39c
  Dimitris Lampridis authored Aug 07, 2019
  
  1b74c39c
06 Aug, 2019 1 commit
- [doc] fix address of VIC IVT_RAM. Closes #1 · 63af6eeb
  Dimitris Lampridis authored Aug 06, 2019
  
  63af6eeb
02 Aug, 2019 1 commit
- [hdl] fix bug in gc_sync_word_rd with wrong signal used for loading the next input · 14e96565
  Dimitris Lampridis authored Aug 02, 2019
  
  14e96565
01 Aug, 2019 2 commits
- gc_sync_word_*: use the same name to use the same constraints. · cc5228b9
  Tristan Gingold authored Aug 01, 2019
  
  cc5228b9
- Add gc_sync_word_rd core. · c99ecb4c
  Tristan Gingold authored Aug 01, 2019
  
  c99ecb4c
29 Jul, 2019 5 commits

[hdl] move assertion check from gc_sync_word_wr to gc_pulse_synchronizer · eaacde90
Dimitris Lampridis authored Jul 29, 2019

eaacde90
[hdl] code cleanup of gc_frequency_meter · b814d633
Dimitris Lampridis authored Jul 29, 2019

b814d633

[hdl] add g_SYNC_OUT option to gc_frequency meter. · 686760c9

Dimitris Lampridis authored Jul 29, 2019

Without this option, the two outputs of the module are in different clock domains. The frequency value is in the clk_in domain, while the "valid" flag is in the system clock domain.

With the new option, if set to TRUE, both outputs will be in the system clock domain.

686760c9

[hdl] re-work gc_sync_word_wr · 13cebbbd

Dimitris Lampridis authored Jul 29, 2019

This commit does three changes to gc_sync_word_wr:

1. It converts it to use internally gc_pulse_synchroniser2
2. It introduces a new "busy" output bit
3. It introduces a new generic, g_AUTO_WR which instructs the core to write a new word continously, without input from the user.

13cebbbd

[hdl] gc_pulse_synchroniser2: add new output port ACK · ba8802fe
Dimitris Lampridis authored Jul 29, 2019

ba8802fe

24 Jul, 2019 3 commits
- gen_buildinfo: also works in simulation mode. · 5dde6da5
  Tristan Gingold authored Jul 24, 2019
  
  5dde6da5
- [tools] fix mem_init_gen to work with Python3 · 6abae0c0
  Dimitris Lampridis authored Jul 24, 2019
  
  6abae0c0
- add c_DUMMY_WB_SLAVE_D64_IN constant · bee232b2
  Dimitris Lampridis authored Jul 24, 2019
  
  bee232b2
19 Jul, 2019 3 commits
- wb_vic: add fixed polarity; partial rewrite. · ca0ce6ce
  Tristan Gingold authored Jul 19, 2019
  
  ca0ce6ce
- Document wb_split · 68e1c650
  Tristan Gingold authored Jul 19, 2019
  
  68e1c650
- Add wb_split core. · e8b948ed
  Tristan Gingold authored Jul 19, 2019
  
  e8b948ed
16 Jul, 2019 1 commit
- Add gen_buildinfo.py file. · ac43a1db
  Tristan Gingold authored Jul 16, 2019
  
  ac43a1db