Commit 284373b7 authored by Dimitris Lampridis's avatar Dimitris Lampridis

[hdl] allow general-cores modules to work with hdlmake even when 'target' is not set

parent 116a9bf8
......@@ -3,9 +3,16 @@ files = [
"genram_pkg.vhd",
"memory_loader_pkg.vhd"];
try:
target
except NameError:
target = ""
if (target == "altera"):
modules = {"local" : ["altera", "generic", "common"]}
elif (target == "xilinx" and syn_device[0:4].upper()=="XC6V"):
modules = {"local" : ["xilinx", "xilinx/virtex6", "common"]}
elif (target == "xilinx"):
modules = {"local" : ["xilinx", "generic", "common"]}
else:
modules = {"local" : ["generic", "common"]}
......@@ -9,7 +9,12 @@ files = [ "generated/xwb_lm32.vhd",
"src/lm32_include.v",
"src/lm32_ram.vhd",
"src/lm32_shifter.v"];
try:
target
except NameError:
target = ""
if(target == "altera"):
files.extend(["platform/generic/lm32_multiplier.v", "platform/altera/jtag_tap.v"]);
elif (target == "xilinx" and syn_device[0:4].upper()=="XC6S"): # Spartan6
......
try:
target
except NameError:
target = ""
if target=="altera":
modules = {"local" : "altera"}
elif target=="xilinx":
modules = {"local" : "xilinx"}
\ No newline at end of file
modules = {"local" : "xilinx"}
else:
pass
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