Commits · c80106523c686e82315b205fe19490c1944dd948 · white-rabbit / wr-switch-hdl · Open Hardware Repository

19 Mar, 2012 3 commits
- swcore: new allocator with bug-free RAM · c8010652
  Tomasz Wlostowski authored Mar 19, 2012
  
  c8010652
- swcore: old allocator with fixed RAM models · 6933ea22
  Tomasz Wlostowski authored Mar 19, 2012
  
  6933ea22
- swcore: removed unnecessary files · c2408157
  Tomasz Wlostowski authored Mar 19, 2012
  
  c2408157
18 Mar, 2012 4 commits
- new allocator · ed6aeb40
  Tomasz Wlostowski authored Mar 18, 2012
  
  ed6aeb40
- swcore: Xilinx RAM model with read-after-write workaround · 58d24af2
  Tomasz Wlostowski authored Mar 18, 2012
  
  58d24af2
- applied stash · 747d1744
  Tomasz Wlostowski authored Mar 18, 2012
  
  747d1744
- testbench/swcore: allocator TB · 39b09dbc
  Tomasz Wlostowski authored Mar 18, 2012
  
  39b09dbc
16 Mar, 2012 8 commits
- modules/wrsw_txtsu: added support for invalid timestamp indication · 064fd70e
  Tomasz Wlostowski authored Mar 16, 2012
  
  064fd70e
- modules/wrsw_swcore: added cross-hierarchy chipscope probes · f3c3994c
  Tomasz Wlostowski authored Mar 16, 2012
  
  f3c3994c
- modules/wrsw_swcore/mpm: mpm_async_fifo: added extra gray counter sync stage to… · 2cf7a47b
  Tomasz Wlostowski authored Mar 16, 2012
```
modules/wrsw_swcore/mpm: mpm_async_fifo: added extra gray counter sync stage to prevent (rather improbable) metastability
```
  2cf7a47b
- modules/wrsw_nic: support for invalid timestamp indication · 97e035f9
  Tomasz Wlostowski authored Mar 16, 2012
  
  97e035f9
- swcore: temp bugfix · f2de0510
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  f2de0510
- swcore: changed the order of writting Linked List entry (now we first clear the… · f98c6575
  Maciej Lipinski authored Mar 16, 2012
```
swcore: changed the order of writting Linked List entry (now we first clear the next page, if available, then we write the current page(address of the next/size))
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  f98c6575
- swcore: output_block ram input signales registered · 38157760
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  38157760
- swcore: Linked List's ram input signales registered · 56a0f09a
  Maciej Lipinski authored Mar 16, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  56a0f09a
15 Mar, 2012 5 commits
- swcore: beautifulized i/o block sources · 358ff7a5
  Tomasz Wlostowski authored Mar 15, 2012
  
  358ff7a5
- modules/wrsw_swcore/xswc_input_block.vhd: added ChipScope tap output · a41240fb
  Tomasz Wlostowski authored Mar 15, 2012
  
  a41240fb
- swcore: bugfix: lossing rtu decisions in case of very short stuck input · 2dfa0b8e
  Maciej Lipinski authored Mar 15, 2012
  
  2dfa0b8e
- swcore: bug with lossing rtu decisions in case of stuck input · 676c5b4a
  Maciej Lipinski authored Mar 14, 2012
  
  676c5b4a
- swcore: input block free-force deallocation bugfix · 19db0a4f
  Maciej Lipinski authored Mar 13, 2012
```
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>
```
  19db0a4f
13 Mar, 2012 6 commits
- rt/softpll-ng.c: code snapshot correctly compiling · 9376f7e9
  Tomasz Wlostowski authored Mar 13, 2012
  
  9376f7e9
- top/scb_6ports: new swcore and I2C master for mini-backplane · ceb1897b
  Tomasz Wlostowski authored Mar 13, 2012
  
  ceb1897b
- wrsw_top_pkg.vhd: updated components · c34c4cc5
  Tomasz Wlostowski authored Mar 13, 2012
  
  c34c4cc5
- scb_top_sim.vhd: propagated AUX clock through the module to the real top · 86d7a691
  Tomasz Wlostowski authored Mar 13, 2012
  
  86d7a691
- scb_top_bare.vhd: added I2C and new Swcore · c2920898
  Tomasz Wlostowski authored Mar 13, 2012
  
  c2920898
- simulation models: RTU model with indirect PCRx register addressing · b4f676f9
  Tomasz Wlostowski authored Mar 13, 2012
  
  b4f676f9
12 Mar, 2012 7 commits
- wrsw_swcore: xswc_input_block: added protection against sending packets back to the originatin port · 78f458d9
  Tomasz Wlostowski authored Mar 12, 2012
  
  78f458d9
- wrsw_swcore: bugfix: MPM ReadPath -> LL moved to IO clock domain · c153df5b
  Tomasz Wlostowski authored Mar 12, 2012
  
  c153df5b
- wr_softpll_ng: period detector is now optional (configurable via generic) · 84500045
  Tomasz Wlostowski authored Mar 12, 2012
  
  84500045
- wrsw_rtu: removed HCAM stuff (no longer used) · 64ec2aca
  Tomasz Wlostowski authored Mar 12, 2012
  
  64ec2aca
- wrsw_rtu: re-done Wishbone register layout to have indirect addressing of PCR… · 1af92561
  Tomasz Wlostowski authored Mar 12, 2012
```
wrsw_rtu: re-done Wishbone register layout to have indirect addressing of PCR registers. Replaced plain signal WB register connections with a structure
```
  1af92561
- rt/ipc: defined RT subsystem mini-rpc API · e8cca025
  Tomasz Wlostowski authored Mar 12, 2012
  
  e8cca025
- rt: merged rt-ipc branch with re-done control algo for softpll · 9ecb75a7
  Tomasz Wlostowski authored Mar 12, 2012
  
  9ecb75a7
11 Mar, 2012 1 commit
- rt: softpll-ng: added phase trackers (replacement of VHDL dmtd_phase_meas) · 65319b5f
  Tomasz Wlostowski authored Mar 11, 2012
  
  65319b5f
09 Mar, 2012 1 commit
- rt firmware snapshot for IPC debugging · 8523c575
  Tomasz Wlostowski authored Mar 09, 2012
  
  8523c575
08 Mar, 2012 5 commits
- rt: softpll: last helper with prelocking · be661bdc
  Tomasz Wlostowski authored Mar 08, 2012
  
  be661bdc
- rt: dev/ad9516.c: configured dividers to provide 187.5 MHz clock for the Swcore · 52c1dbdc
  Tomasz Wlostowski authored Mar 08, 2012
  
  52c1dbdc
- merged swcore.v3 · ca702445
  Tomasz Wlostowski authored Mar 08, 2012
  
  ca702445
- hdl: swcore/mpm: added file headers · c0b7d72c
  Tomasz Wlostowski authored Mar 08, 2012
  
  c0b7d72c
- rt: softpll-ng: started porting the main PLL (wip) · aa280177
  Tomasz Wlostowski authored Mar 08, 2012
  
  aa280177