They finally don't help much and they break simulation as Modelsim complains
about types conversion.

Fix it the same way as f_x_to_zero() is fixed in wbgen.

It fixes some functions not well understood by Vivado synthesis

it was de-asserted at wrong value (too early/late). This was making
to misbehave the modules that depend on this signals.

New function expects textfile with binary representation of each word in a
separate line, e.g.:
10011000000000000000000000000000
11010000000000000000000000000000
11010000001000000000000000000000
01111000000000010000000000000000
00111000001000010000000000000000

This for example reduces WRPC SPEC reference design synthesis time from ~26
minutes to ~11 minutes.

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

wb_onewire_master: propagated CDR_N/O generics up the hierarchy; added assignments to (new) unspecified WB signals
Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

Signed-off-by: Dimitris Lampridis <Dimitris.Lampridis@cern.ch>

common/gc_i2c_slave: added option to allow automatic ACK of address byte without external user intervention

This was due to a bug in the f_string2bits() which took the commit ID as a string argument, assuming that the character array of the string is (32 downto 1), while in fact the commit_id is a string(1 to 32).

f_string2bits() is now  more resilient, it works with both "up" and "downto" string arguments, by checking the "ascending" attribute of the string type.