-
cf959c95 · Reorganise driver to separate channel
- ... and 10 more commits. Compare d809e93a...cf959c95
-
17bfcce2 · Automatically generate EDGE driver
- ... and 4 more commits. Compare 1f25e60b...17bfcce2
-
d809e93a · Reworked reset logic due to PLL usage
-
be925b79 · Missing connections for memory
-
0578698f · Add separate control of ext clock divider
- ... and 2 more commits. Compare df8eeb6c...0578698f
closed
issue
#9
"Add option to adjust external output clock divider independently"
at
Projects / FMC DEL 1ns 2cha
commented on
issue #9
"Add option to adjust external output clock divider independently"
at
Projects / FMC DEL 1ns 2cha
Fixed.
-
df8eeb6c · Remove one level of hierarchy
- ... and 17 more commits. Compare 641d61cb...df8eeb6c
-
df8eeb6c · Remove one level of hierarchy
- ... and 3 more commits. Compare 25a2ea48...df8eeb6c