Reorganise driver to separate channel
Move all channel related registers to a separate Cheby/EDGE block to simplify the driver interfacing. Unfortunately it's not possible to put the memories there otherwise the memory space ends up being too big.
Showing
- doc/manual/ffpg_core.htm 1273 additions, 519 deletionsdoc/manual/ffpg_core.htm
- hdl/ffpg/cheby/Makefile 6 additions, 4 deletionshdl/ffpg/cheby/Makefile
- hdl/ffpg/cheby/ffpg_ch.cheby 153 additions, 0 deletionshdl/ffpg/cheby/ffpg_ch.cheby
- hdl/ffpg/cheby/ffpg_csr.cheby 54 additions, 303 deletionshdl/ffpg/cheby/ffpg_csr.cheby
- hdl/ffpg/cheby/fmc_fpg_pci.cheby 5 additions, 5 deletionshdl/ffpg/cheby/fmc_fpg_pci.cheby
- hdl/ffpg/cheby/fmc_fpg_vme.cheby 5 additions, 5 deletionshdl/ffpg/cheby/fmc_fpg_vme.cheby
- hdl/ffpg/rtl/FfpgCore.vhd 25 additions, 18 deletionshdl/ffpg/rtl/FfpgCore.vhd
- hdl/ffpg/rtl/FfpgCoreWrapper.vhd 3 additions, 1 deletionhdl/ffpg/rtl/FfpgCoreWrapper.vhd
- hdl/ffpg/rtl/ffpg_core_regs.vhd 735 additions, 436 deletionshdl/ffpg/rtl/ffpg_core_regs.vhd
- hdl/ffpg/sim/testbench/ffpg_csr.svh 65 additions, 166 deletionshdl/ffpg/sim/testbench/ffpg_csr.svh
- hdl/top/spec/spec_top_ffpg.vhd 2 additions, 1 deletionhdl/top/spec/spec_top_ffpg.vhd
- hdl/top/svec/svec_top_ffpg.vhd 4 additions, 2 deletionshdl/top/svec/svec_top_ffpg.vhd
- sw/driver/fmc_fpg_pci_hw_desc.csv 31 additions, 28 deletionssw/driver/fmc_fpg_pci_hw_desc.csv
- sw/driver/fmc_fpg_vme_hw_desc.csv 32 additions, 29 deletionssw/driver/fmc_fpg_vme_hw_desc.csv
Please register or sign in to comment