A simple VME64x carrier for two high pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Follow-up of SVEC.

This project covers the hardware development of version 4 of the White Rabbit switch. More info at the Wiki page

DIOT 3U crate mechanics and backplane compliant with CompactPCI-Serial standard.

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

AMC FMC Carrier is designed to support FMC boards. Equiped in Xilinx Artix-7 FPGA. It allows to connect clock source to any clock input. More info at the Wiki page

Software to support the fmc-adc-100m14b4cha mezzanine, including Linux device driver, library and test program.

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

A simple 4-lane PCIe carrier for a low pin count FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. Commercially available. Linux and Labview drivers available for some mezzanine cards. More info at the Wiki page

DDR3 controller with two pipelined Wishbone slave ports. It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen.

Radiation-tolerant AC/DC power supply unit (PSU). In: 230VAC, 50Hz, Out: +12V, 8.33A (100W) and +5V, 2A (10W). Possibility for redundancy. The design is CompactPCI compatible. Part of DIOT project.

The aim of this project is to evaluate resources required to run wr switch HDL on Xilinx Ultrascale+ FPGA

A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.

More info at the Wiki page

A VME card that is used to recover RF, bunch and revolution clocks over a white rabbit network.

More info at the Wiki page

A simple 4-lane PCIe carrier for a FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. More info at the Wiki page

A bridge between the local bus of the Gennum GN4124 (PCIe to local bus bridge) and Wishbone.

A Precise Time Protocol (PTP, IEEE 1588) software stack whose single source code can be compiled for many architectures (POSIX systems, WR switch, WR node, ...) and which is easily extensible.

A project devoted to developing and discussing the CERN Open Hardware Licence. More info at the Wiki page

A UV-mask meant for people with a highly sensitive skin. It features 100% protection from UV and has an integrated fan. The design is fully open. More info at the Wiki page

A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page