Page version | Author | Commit Message | Last updated | Format |
---|---|---|---|---|
6508985e | Dimitris Lampridis | Introduced the concept of BSP | markdown | |
d2149f26 | Dimitris Lampridis | Moved tables to subpage, added link to example instantiation of the module in the VFC-HD base project | markdown | |
0e2c8fca | Dimitris Lampridis | removed extra empty column from data ports table | markdown | |
c9a2205d | Dimitris Lampridis | typos and minor corrections | markdown | |
db313a17 | Dimitris Lampridis | Added link to WR streamers | markdown | |
771cdfb2 | Dimitris Lampridis | Expanded on the introduction | markdown | |
cc9e8caf | Dimitris Lampridis | Finished ports description | markdown | |
e7b7d004 | Dimitris Lampridis | WIP to add module ports section | markdown | |
bbe06966 | Dimitris Lampridis | Added date line at the end | markdown | |
a91e9214 | Dimitris Lampridis | spell check | markdown | |
b43497b0 | Dimitris Lampridis | Provided description for module generics and links to VHDL code | markdown | |
9754cbae | Dimitris Lampridis | First version of the document, WIP | markdown |