Board-vfc-hd.md

+# WhiteRabbit PTP core on VFC-HD
+
+-----
+
+The [WhiteRabbit (WR) PTP core
+project](https://www.ohwr.org/project/wr-cores/wikis) provides support
+for the [VFC-HD board](https://www.ohwr.org/project/vfc-hd/wikis), an
+FMC carrier board based on an Arria V FPGA from Altera.
+
+## Gateware
+
+The main ingredient of the WR PTP core is the FPGA gateware. The WR PTP
+core in the form of a parametrisable VHDL module, to be instantiated in
+your own design.
+
+### Getting it
+
+The FPGA gateware is available on the
+[dlamprid-vfchd](https://www.ohwr.org/project/wr-cores/tree/dlamprid-vfchd/)
+branch of the wr-cores repository (soon to be merged in proposed\_master
+branch).
+
+To get it,
+    use:
+
+    git clone -b dlamprid-vfchd git:https://www.ohwr.org/hdl-core-lib/wr-cores.git
+    cd wr-cores; git submodule update --init
+
+### Using it
+
+### Software for the embedded CPU of the WR PTP core
+
+The WR PTP core also instantiates an embedded softcore CPU (LM32), which
+requires its own software for proper operation.
+
+#### Getting it
+
+The embedded software for the WR PTP core is available on the
+[eeprom\_scan](https://www.ohwr.org/project/wrpc-sw/tree/eeprom_scan/)
+branch of the wrpc-sw repository (soon to be merged in proposed\_master
+branch).
+
+To get it,
+    use:
+
+    git clone -b eeprom_scan git:https://www.ohwr.org/hdl-core-lib/wr-cores/wrpc-sw.git
+    cd wrpc-sw; git submodule update --init
+
+#### Using it
+
+Building and running the embedded software is described in the [White
+Rabbit PTP Core User's Manual](/Current-release#documentation).
+
+The embedded software can be built with the default settings, altough it
+might be beneficial for testing and debugging to enable IP support
+(CONFIG\_IP option), SNMP (SNMP option) and the auxiliary diagnostics
+interface (CONFIG\_AUX\_DIAG option).
+
+The resulting binary can be either added to your HDL design (see TODO),
+or injected to the CPU during runtime (see TODO).
+
+## Software tools provided
+
+Several software tools are provided, to facilitate the programming and
+monitoring of the WR PTP core on the VFC-HD.
+
+These software tools are available on the
+[master](https://gitlab.cern.ch/dlamprid/VFC-HD/tree/master) branch of
+the VFC-HD repository.
+
+To get them, use:
+
+    git clone https://gitlab.cern.ch/dlamprid/VFC-HD.git
+
+The tools themselves are located in the `Sw/WrPtp` folder of the
+repository.
+
+A Makefile is provided for compiling the C sources on CERN Front-End
+Computers. For other configurations, the only dependency for these tools
+is on `libvmebus`, which in turn depends on the `vmebridge` kernel
+driver (currently only supporting the [TSI148 VME to PCI-X
+bridge](http://www.idt.com/products/general-parts/tsi148-vme-pci-x-bridge)).
+
+Both the driver and the library are available on the
+[master](https://gitlab.cern.ch/cohtdrivers/vmebridge/tree/master/driver)
+branch of the vmebridge repository.
+
+To get them, use:
+
+    git clone https://gitlab.cern.ch/cohtdrivers/vmebridge.git
+
+The repository also includes
+[documentation](https://gitlab.cern.ch/cohtdrivers/vmebridge/raw/master/doc/vmebridge.txt)
+on the driver and the library.
+
+### Virtual UART
+
+`Sw/WrPtp/vfchd-uart.c`
+
+This tool provides access to the virtual UART of the WR PTP core. This
+is very useful for controlling and monitoring of the WR PTP core, since
+the VFC-HD does not provide a physical UART.
+
+The tool expects one argument, the slot where the VFC-HD card is located
+inside the VME crate.
+
+### Embedded software loader
+
+`Sw/WrPtp/vfchd-wrc_loader.c`
+
+This tool allows the user to inject code to the WR PTP core embedded CPU
+during runtime.
+
+The tool expects two arguments, the slot where the VFC-HD card is
+located inside the VME crate and the path to the software binary for the
+embedded CPU.
+
+### WR EEPROM loader
+
+`Sw/WrPtp/vfchd-eeprom_loader.c`
+
+This tool allows the user to write to the I2C EEPROM of the WR PTP core,
+which is used for storing calibration values, initialisation scripts,
+etc.
+
+This tool is useful on a new VFC-HD board, or when the EEPROM is
+corrupt, in order to "format" it for use by the WR PTP core. Once the
+EEPROM has the proper format, the WR PTP core will automatically use it
+to read/write values. The user can also read/write values via the
+virtual UART.
+
+The tool expects two arguments, the slot where the VFC-HD card is
+located inside the VME crate and the path to the EEPROM image to load.
+An empty image, ready to be written to the EEPROM with this tool, is
+[available](https://www.ohwr.org/project/wr-cores/uploads/17bd1dadff57f8b770d9af856a8b3d7b/sdbfs-empty-i2c-eeprom.bin)
+
+## Support
+
+To get support for the integration of the WR PTP core into your VFC-HD
+application, you can reach the WR developers on the [white-rabbit-dev
+mailing list](white-rabbit-dev@ohwr.org).
+
+To get support for the VFC-HD board itself you can use one of the
+contacts mentioned in the [VFC-HD project
+wiki](https://www.ohwr.org/project/vfc-hd/wikis).
+