1. 10 Dec, 2021 1 commit
    • Peter Jansweijer's avatar
      Is this a gthe4 wizzard bug? · 6d93f15c
      Peter Jansweijer authored
      When implementing gthe4 in Atrix UltraScale+ with clk_gth_i = 125 MHz the tx_out_clk_o should be 62.5 MHz.
      However, there is a BUG_GT in the lower instantiations that is initialized with a DIV input set to 2. This causes tx_out_clk_o to be 31.25 MHz instead of 62.5 MHz.
      6d93f15c
  2. 09 Dec, 2021 1 commit
  3. 25 Jun, 2021 8 commits
  4. 19 Apr, 2021 1 commit
  5. 26 Jan, 2021 2 commits
  6. 18 Jan, 2021 2 commits
  7. 12 Jan, 2021 1 commit
  8. 06 Jan, 2021 1 commit
  9. 15 Dec, 2020 1 commit
  10. 09 Dec, 2020 1 commit
  11. 02 Oct, 2020 1 commit
  12. 29 Sep, 2020 2 commits
  13. 16 Sep, 2020 10 commits
  14. 15 Sep, 2020 8 commits