Commit a5fde2b1 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

board/spec: fix async reset bug introduced in commit 10772350

parent 7a4a9875
......@@ -385,7 +385,7 @@ begin -- architecture struct
ppulse_o => areset_edge_ppulse);
-- logic AND of all async reset sources (active high)
rstlogic_arst <= (not pll_locked) and (not areset_n_i) and areset_edge_ppulse;
rstlogic_arst <= (not pll_locked) or (not areset_n_i) or areset_edge_ppulse;
-- concatenation of all clocks required to have synced resets
rstlogic_clk_in(0) <= clk_pll_62m5;
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