- 04 Jun, 2019 6 commits
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A. Hahn authored
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A. Hahn authored
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A. Hahn authored
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A. Hahn authored
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Michael Reese authored
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Mathias Kreider authored
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- 14 Dec, 2017 1 commit
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Maciej Lipinski authored
the wishbone package In wishbone_pkg.vhd, the new g_sdb_name generic was added to xwb_crossbar instead of xwb_sdb_crossbar. Fixed
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- 13 Dec, 2017 2 commits
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Piotr Miedzik authored
- sdb_rom: add parameter g_sdb_name - xwb_sdb_crossbar: add parameter g_sdb_name - wishbone_pkg: f_string_fix_len add parameter justify_right - wishbone_pkg: f_sdb_auto_device add parameter name - wishbone_pkg: f_sdb_auto_bridge add parameter name
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Grzegorz Daniluk authored
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- 11 Oct, 2017 9 commits
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Dimitris Lampridis authored
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Dimitris Lampridis authored
wishbone/wb_gpio_port: match length of gpio_b to gpio_in when g_num_pins is not an exact multiple of 32. Closes #1532
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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- 10 Oct, 2017 1 commit
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Dimitris Lampridis authored
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- 27 Sep, 2017 1 commit
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Dimitris Lampridis authored
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- 25 Aug, 2017 10 commits
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Grzegorz Daniluk authored
They finally don't help much and they break simulation as Modelsim complains about types conversion.
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
Fix it the same way as f_x_to_zero() is fixed in wbgen.
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Grzegorz Daniluk authored
It fixes some functions not well understood by Vivado synthesis
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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- 22 Aug, 2017 1 commit
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Tomasz Wlostowski authored
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- 23 Jun, 2017 1 commit
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Maciej Lipinski authored
it was de-asserted at wrong value (too early/late). This was making to misbehave the modules that depend on this signals.
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- 02 May, 2017 1 commit
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Tomasz Wlostowski authored
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- 16 Mar, 2017 1 commit
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Stefan Rauch authored
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- 20 Feb, 2017 1 commit
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Grzegorz Daniluk authored
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- 14 Feb, 2017 5 commits
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
New function expects textfile with binary representation of each word in a separate line, e.g.: 10011000000000000000000000000000 11010000000000000000000000000000 11010000001000000000000000000000 01111000000000010000000000000000 00111000001000010000000000000000 This for example reduces WRPC SPEC reference design synthesis time from ~26 minutes to ~11 minutes.
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