genrams/generic_shiftreg_fifo: don't clear the FIFO contents on reset (this was causing inference of FFs instead of SRLs)

Due to the way Altera uses padding, it is not possible to eliminate it without
the full state recovered during TLP decoding. Therefore, this version moves
the padding handling after the 64-32 conversion.

Furthermore, the decoding of TLP records now follows the PCIe 3.0 standard
instead of the slim Altera documentation. All incoming TLP formats should be
correctly processed without losing synchronization.

Remove SDC constraints which apply to megafunction options we do not use.

to ensure stabilization.

There is only one set of registers per read TLP data.

This used to be safe before the previous commit added STB outside of CYC.

Must detect BAR change during address decode.

Some Atom processors can not map so large a BAR.

Stall bar transitions when ACKs are inflight

Bug: std_match is needed when comparing '-'s

stub wishbone device added for testing

Implement a wishbone streaming interface bridge from the Avalon RX stream

Add driver stub code

Modified PLL for two outputs
Added power on reset
Re-instantiated the PCIe megafunction