general-cores version for WRS firmware v7.0 release

general-cores version for WRS firmware v6.0 release

1.1.4 - 2023-10-18
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.4

Fixed
-----
- sw: kernel compatibilty with modern version

1.1.3 - 2021-08-23
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.2

Fixed
-----
- sw: kernel crash of htvic removal on modern kernel

1.1.2 - 2021-07-29
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.2

Fixed
-----
- sw: improve compatibility with newer (> 3.10) Linux kernel versions

1.1.1 - 2020-09-14
==================

Fixed
-----
- sw: fix SPI driver to update the spi_message->actual_length

1.1.0 - 2020-07-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.0

Added
-----
- hdl: New indirect wishbone master (driven by an address and data register).
- hdl: New memory wrapper for Cheby.
- hdl: Provide a simple vhdl package to generate WB transactions.
- hdl: New wb_xc7_fw_update module.
- bld: Introduce gen_sourceid.py script to generate a package with the source id.

Changed
-------
- bld: gen_buildinfo.py now adds tag and dirty flag.

Fixed
-----
- hdl: regression to gc_sync_ffs introduced by v1.0.4.
- hdl: add dummy generic to generic_dpram in altera.
- hdl: add missing generics to generic_sync_fifo in genram_pkg.
- hdl: avoid f_log2() circular dependencies in gc_extend_pulse.

Release v1.2 of BTrain-over-WhiteRabbit
https://gitlab.cern.ch/BTrain-TEAM/Btrain-over-WhiteRabbit/wikis/home

1.0.2 - 2019-10-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.2

Fixed
-----
- [ci] forgot rule to publish RPMs

1.0.1 - 2019-10-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.1

Added
-----
- [ci] building and publish RPMs automatically on new releases

1.0.4 - 2020-03-26
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.4

Added
-----
- [hdl] VHDL functions to convert characters and strings to upper/lower case.
- [sw][i2c] Support for kernel greater than 4.7.
- [hdl] Separate synchroniser and edge detection modules.
- [hdl] 8b10b encoder.

Changed
-------
- [hdl] Rewritten the WB master interface used in simulations.
- [hdl] Reimplement gc_sync_ffs using new synchroniser and edge detectors.

Fixed
-----
- [sw][spi] Align polarity and phase for Rx and Tx.
- [hdl][i2c] Fix reset lock for I2C master.
- [hdl] Avoid cyclic dependencies for log2 ceiling functions.

[1.0.3] - 2020-01-15
====================
Changed
-----
- [sw] add more file to .gitignore

All notable changes to this project will be documented in this file.

The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

- First release of general-cores.

[Unreleased]: https://www.ohwr.org/project/general-cores/compare/v1.0.0...proposed_master
[1.0.0]: https://www.ohwr.org/project/general-cores/tags/v1.0.0

This is version of genera-cores used by BTrain-ELENA v2.5

Release of Btrain-over-WhiteRabbit with two main additions:
- support for VXS switch
- up/down converter

used for masterFIP v1.1.0 release of 20171123

general-cores for WRPC v4.2

general-cores for WRPC v4.1

general-cores for WRPC v4.0