None of our devices use the rty signal, but handle it for completeness.

modules/wishbone/wb_pcie/pcie_tlp.vhd

@@ -30,6 +30,7 @@ entity pcie_tlp is
     wb_stall_i    : in  std_logic;
     wb_ack_i      : in  std_logic;
     wb_err_i      : in  std_logic;
+    wb_rty_i      : in  std_logic;
     wb_dat_i      : in  std_logic_vector(31 downto 0));
 end pcie_tlp;
 
@@ -428,7 +429,7 @@ begin
             if r_pending_ack = 1 then
               tx_eop_o <= '1';
             end if;
-            if (wb_ack_i or wb_err_i) = '1' then
+            if (wb_ack_i or wb_err_i or wb_rty_i) = '1' then
               r_tx_en <= '1';
               r_pending_ack <= r_pending_ack - 1;
             end if;
@@ -440,7 +441,7 @@ begin
   flight_counter : process(clk_i)
   begin
     if rising_edge(clk_i) then
-      if (wb_ack_i or wb_err_i) = '1' then
+      if (wb_ack_i or wb_err_i or wb_rty_i) = '1' then
         if (wb_stb and not wb_stall_i) = '1' then
           r_flight_count <= r_flight_count;
         else

modules/wishbone/wb_pcie/pcie_wb.vhd

@@ -106,6 +106,7 @@ begin
     wb_stall_i    => wb_stall,
     wb_ack_i      => wb_ack,
     wb_err_i      => slave_o.err,
+    wb_rty_i      => slave_o.rty,
     wb_dat_i      => wb_dat);
   
   clock_crossing : xwb_clock_crossing port map(
@@ -132,8 +133,8 @@ begin
   begin
     if rising_edge(internal_wb_clk) then
       -- Shift in the error register
-      if slave_o.ack = '1' or slave_o.err = '1' then
-        r_error <= r_error(r_error'length-2 downto 0) & slave_o.err;
+      if slave_o.ack = '1' or slave_o.err = '1' or slave_o.rty = '1' then
+        r_error <= r_error(r_error'length-2 downto 0) & (slave_o.err or slave_o.rty);
       end if;
       
       -- Is the control BAR targetted?

modules/wishbone/wb_pcie/pcie_wb_pkg.vhd

@@ -81,6 +81,7 @@ package pcie_wb_pkg is
       wb_stall_i    : in  std_logic;
       wb_ack_i      : in  std_logic;
       wb_err_i      : in  std_logic;
+      wb_rty_i      : in  std_logic;
       wb_dat_i      : in  std_logic_vector(31 downto 0));
   end component;
 end pcie_wb_pkg;