- 27 Aug, 2015 2 commits
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David Cussans authored
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David Cussans authored
* Editing simulation test bench to remove ports no longer present ( simulation_src/fmc-tlu_v0-1_test-bench.vhd ) * Tidying up documentation ( in Doxygen / VHDL need to put @brief etc. near entity decl not at top of file ... )
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- 26 Aug, 2015 3 commits
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David Cussans authored
T0_Shutter_Iface_rtl.vhd (which doesn't expect external shutter/T0 signals) * Edited setup_project.tcl to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited sp605_FMC_mTLU_v1a.ucf to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited fmc_tlu_chipscope.cdc to change connections associated with change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd
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David Cussans authored
to internal clock generation before merging back to trunk.
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David Cussans authored
Made links from HDL source files to HDL designer directories to permit HDL designer to work but make is easy to build firmware if HDL designer not present Added some more scripts.
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- 24 Aug, 2015 1 commit
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David Cussans authored
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- 28 May, 2015 4 commits
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David Cussans authored
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David Cussans authored
Adding files to build scripts
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David Cussans authored
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David Cussans authored
* Edited top_extphy to include IPBus interface to TPx3 interface.
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- 21 May, 2015 3 commits
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David Cussans authored
* Set top module by hand. * Changed UCF to be hacked-for-telescope version * Removed unnessary files that were being added to project * Added clock_sim.vhd , eth_mac_sim.vhd. The "generate" statement will stop them being synthesized but they still need to be in project to avoid errors.
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David Cussans authored
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David Cussans authored
Added a common delay to all pulses ( needs changing ). Edited triggerlogic to accomodate this. * Moved s_reset_timestamp_ipbus<='0' , might have been causing a bug in reset * Edited TPix3_iface to allow the shutter and T0 to be set under IPBus control * logic_clocks now chooses between external ( from 2-pole Lemo ) and internal ( from sysclk xtal ) clock using a generate statement and generic. * DUTInterfaces - stretch output trigger pulse to two clock cycles.
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- 15 May, 2015 6 commits
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David Cussans authored
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David Cussans authored
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David Cussans authored
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David Cussans authored
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David Cussans authored
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David Cussans authored
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- 13 May, 2015 1 commit
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David Cussans authored
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- 11 May, 2015 3 commits
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David Cussans authored
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David Cussans authored
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David Cussans authored
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- 08 May, 2015 1 commit
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David Cussans authored
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- 09 Dec, 2014 3 commits
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David Cussans authored
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David Cussans authored
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David Cussans authored
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- 05 Dec, 2014 1 commit
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David Cussans authored
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- 04 Dec, 2014 1 commit
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David Cussans authored
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- 03 Dec, 2014 1 commit
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David Cussans authored
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- 02 Dec, 2014 2 commits
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David Cussans authored
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David Cussans authored
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- 21 Nov, 2014 2 commits
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David Cussans authored
Synchronous mode output to TORCH readout. Input from pc048a clock/sync fanout - clock , T0 , shutter.
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David Cussans authored
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- 24 Oct, 2014 1 commit
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David Cussans authored
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- 23 Oct, 2014 2 commits
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David Cussans authored
Wrote simple firmware to exercise DUT interface pins. Puts out a series of pulses on each pin. See https://elog.phy.bris.ac.uk/elog/AIDA/17 as an example
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David Cussans authored
Wrote a pattern generator function that puts out 0101 pattern then a string of 0. Different number of 01 on different bits
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- 09 Oct, 2014 2 commits
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David Cussans authored
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David Cussans authored
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- 01 Jul, 2014 1 commit
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David Cussans authored
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