* Removed duplicate files ( some were added twice )

* Set top module by hand. * Changed UCF to be hacked-for-telescope version * Removed unnessary files that were being added to project * Added clock_sim.vhd , eth_mac_sim.vhd. The "generate" statement will stop them being synthesized but they still need to be in project to avoid errors.

* Removed duplicate files ( some were added twice )
* Set top module by hand. * Changed UCF to be hacked-for-telescope version * Removed unnessary files that were being added to project * Added clock_sim.vhd , eth_mac_sim.vhd. The "generate" statement will stop them being synthesized but they still need to be in project to avoid errors.
a6c17ac3 · David Cussans · 6c9328ca · a6c17ac3
Commit a6c17ac3 authored May 21, 2015 by David Cussans
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Showing with 15 additions and 10 deletions

setup_project.tcl firmware/config/ise14/sp605/setup_project.tcl +15 -10

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--- a/firmware/config/ise14/sp605/setup_project.tcl
+++ b/firmware/config/ise14/sp605/setup_project.tcl
@@ -74,7 +74,6 @@ xfile add ipbus/firmware/slaves/hdl/ipbus_reg_types.vhd
 #xfile add ipbus/firmware/slaves/hdl/syncreg_w.vhd
 #xfile add ipbus/firmware/slaves/hdl/ipbus_syncreg_v.vhd
 xfile add ipbus/firmware/slaves/hdl/ipbus_ctrlreg_v.vhd
-xfile add ipbus/firmware/slaves/hdl/ipbus_ctrlreg_v.vhd

 # Add Opencores files for i2c interface
 xfile add external/opencores_i2c/i2c_master_bit_ctrl.vhd
@@ -117,7 +116,7 @@ xfile add fmc-mtlu/firmware/hdl/common/ipbus_ver.vhd
 xfile add fmc-mtlu/firmware/hdl/common/logic_clocks_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/pulseClockDomainCrossing_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/Reg_2clks.vhd
-xfile add fmc-mtlu/firmware/hdl/common/registerCounter_rtl.vhd
+#xfile add fmc-mtlu/firmware/hdl/common/registerCounter_rtl.vhd
 xfile add fmc-mtlu/firmware/hdl/common/IODELAYCal_FSM_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/serdes_1_to_n_SDR.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/sync_reg.vhd
@@ -128,13 +127,11 @@ xfile add fmc-mtlu/firmware/hdl/common/arrivalTimeLUT_rtl.vhd
 xfile add fmc-mtlu/firmware/hdl/test/clock_divider_s6.v
 xfile add fmc-mtlu/firmware/hdl/common/counterWithReset_rtl.vhd
 xfile add fmc-mtlu/firmware/hdl/common/synchronizeRegisters_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/TPx3Logic_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
-xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
+#xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
+xfile add fmc-mtlu/firmware/hdl/common/TPx3_iface_rtl.vhd
+#xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
+#xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
 xfile add fmc-mtlu/firmware/hdl/common/pulseClockDomainCrossing_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
 xfile add fmc-mtlu/firmware/hdl/common/coincidenceLogic_rtl.vhd
 xfile add fmc-mtlu/firmware/hdl/common/stretchPulse_rtl.vhd

@@ -148,10 +145,18 @@ xfile add fmc-mtlu/firmware/hdl/common/fmcTLU_pkg_body.vhd
 xfile add fmc-mtlu/firmware/hdl/common/fmcTLU_pkg.vhd


-
+# Add files that only ever get built for simulation...
+xfile add ipbus/firmware/sim/hdl/clock_sim.vhd
+xfile add ipbus/firmware/ethernet/sim/eth_mac_sim.vhd

 # Add user constraints file
-xfile add fmc-mtlu/firmware/ucf/sp605_FMC_mTLU_v1a.ucf
+xfile add fmc-mtlu/firmware/ucf/sp605_FMC_mTLU_v1a_tpixJ2.ucf
+# sp605_FMC_mTLU_v1a.ucf
+
+# Add chipscope definition file.
+xfile add fmc-mtlu/firmware/chipscope/fmc_tlu_chipscope.cdc
+
+project set top "top_extphy"

 project close