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AIDA-2020 TLU
Commit 395b773e authored by David Cussans's avatar David Cussans
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Checking in changes after debugging

parent 9de93149
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firmware/cactus/connection.xml 0 → 100644
View file @ 395b773e
<?xml version="1.0" encoding="UTF-8"?>
<connections>
<!-- DUMMY UDP -->
<!-- <connection id="minitlu" uri="chtcp-2.0://128.141.139.11:10203?target=192.168.200.16:50001" address_table="file://miniTLU.xml" /> -->
<connection id="minitlu" uri="ipbusudp-2.0://192.168.5.16:50001" address_table="file://miniTLU.xml" />
</connections>
firmware/cactus/miniTLU.xml 0 → 100644
View file @ 395b773e
<?xml version="1.0" encoding="ISO-8859-1"?>
<node id="miniTLU">
<node id="DUTInterfaces" address="0x020" description="DUT Interfaces control registers">
<node id="DutMaskW" address="0x0" permission="w" description="" />
<node id="DutMaskR" address="0x4" permission="r" description="" />
<node id="IgnoreDUTBusyW" address="0x1" permission="w" description="" />
<node id="IgnoreDUTBusyR" address="0x5" permission="r" description="" />
<node id="IgnoreShutterVetoW" address="0x2" permission="w" description="" />
<node id="IgnoreShutterVetoR" address="0x6" permission="r" description="" />
</node>
<node id="triggerInputs" address="0x040" description="Inputs configuration">
<node id="SerdesRst" address="0x0" permission="w" description="" />
<node id="SerdesRstR" address="0x8" permission="w" description="" />
<node id="ThrCount0R" address="0x9" permission="w" description="" />
<node id="ThrCount1R" address="0xa" permission="w" description="" />
<node id="ThrCount2R" address="0xb" permission="w" description="" />
<node id="ThrCount3R" address="0xc" permission="w" description="" />
</node>
<node id="triggerLogic" address="0x060" description="Trigger logic configuration">
<node id="PostVetoTriggersR" address="0x8" permission="r" description="" />
<node id="PreVetoTriggersR" address="0x9" permission="r" description="" />
<node id="InternalTriggerIntervalW" address="0x2" permission="w" description="" />
<node id="InternalTriggerIntervalR" address="0xa" permission="r" description="" />
<node id="TriggerPatternW" address="0x3" permission="w" description="" />
<node id="TriggerPatternR" address="0xb" permission="r" description="" />
<node id="TriggerVetoW" address="0x4" permission="w" description="" />
<node id="TriggerVetoR" address="0xc" permission="r" description="" />
<node id="ExternalTriggerVetoR" address="0xd" permission="r" description="" />
<node id="ResetCountersW" address="0x6" permission="w" description="" />
<node id="PulseStretchR" address="0xf" permission="r" description="" />
<node id="PulseStretchW" address="0x7" permission="w" description="" />
</node>
<node id="eventBuffer" address="0x080" description="Event buffer">
<node id="EventFifoData" address="0x0" mode="non-incremental" permission="r" description="" />
<node id="EventFifoFillLevel" address="0x1" permission="r" description="" />
<node id="EventFifoCSR" address="0x2" permission="rw" description="" />
<node id="EventFifoFillLevelFlags" address="0x3" permission="r" description="" />
</node>
<node id="logic_clocks" address="0x0A0" description="Clocks configuration">
<node id="LogicClocksCSR" address="0x0" permission="rw" description="" />
<node id="LogicRst" address="0x1" permission="w" description="" />
</node>
<node id="i2c_master" address="0x0C0" description="I2C Master interface">
<node id="i2c_pre_lo" address="0x0" mask="0x000000ff" permission="rw" description="" />
<node id="i2c_pre_hi" address="0x1" mask="0x000000ff" permission="rw" description="" />
<node id="i2c_ctrl" address="0x2" mask="0x000000ff" permission="rw" description="" />
<node id="i2c_rxtx" address="0x3" mask="0x000000ff" permission="rw" description="" />
<node id="i2c_cmdstatus" address="0x4" mask="0x000000ff" permission="rw" description="" />
</node>
<node id="Event_Formatter" address="0x140" description="Event formatter configuration">
<node id="Enable_Record_Data" address="0x0" permission="rw" description="" />
<node id="ResetTimestampW" address="0x1" permission="w" description="" />
<node id="CurrentTimestampLR" address="0x2" permission="r" description="" />
<node id="CurrentTimestampHR" address="0x3" permission="r" description="" />
</node>
<node id="version" address="0x0" description="firmware version" permission="r">
</node>
</node>
</node>
firmware/cactus/test.xml 0 → 100644
View file @ 395b773e
<?xml version="1.0" encoding="UTF-8"?>
<connections>
<!-- DUMMY UDP -->
<connection id="minitlu" uri="ipbusudp-1.3://192.168.200.16:50001" address_table="file://miniTLU.xml" />
</connections>
firmware/chipscope/fmc_tlu_chipscope.cdc 0 → 100644
View file @ 395b773e
#ChipScope Core Inserter Project File Version 3.0
#Mon May 11 10:50:57 BST 2015
Project.device.designInputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/top_extphy_cs.ngc
Project.device.designOutputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/top_extphy_cs.ngc
Project.device.deviceFamily=18
Project.device.enableRPMs=true
Project.device.outputDirectory=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/_ngo
Project.device.useSRL16=true
Project.filter.dimension=16
Project.filter<0>=*ignore*
Project.filter<10>=*s_coarse_timestamp_h*
Project.filter<11>=*reset_timestamp*
Project.filter<12>=*coarse_timestamp_h*
Project.filter<13>=*coarse*
Project.filter<14>=*clk*
Project.filter<15>=clk*
Project.filter<1>=I2/s_coarse_timestamp_h*
Project.filter<2>=I2/*ignore*
Project.filter<3>=I2/*coarse_timestamp*
Project.filter<4>=*coarse_timestamp*
Project.filter<5>=*veto*
Project.filter<6>=
Project.filter<7>=*busy*
Project.filter<8>=*shutter*
Project.filter<9>=*T0*
Project.icon.boundaryScanChain=1
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerOut=false
Project.icon.triggerInPinName=
Project.icon.triggerOutPinName=
Project.unit.dimension=1
Project.unit<0>.clockChannel=clk_4x_logic
Project.unit<0>.clockEdge=Rising
Project.unit<0>.dataChannel<0>=I2/s_coarse_timestamp_h<0>
Project.unit<0>.dataChannel<1>=I2/s_coarse_timestamp_h<1>
Project.unit<0>.dataChannel<2>=I2/s_reset_timestamp_ipbus
Project.unit<0>.dataChannel<3>=I2/s_reset_timestamp_4x
Project.unit<0>.dataChannel<4>=I15/T0_o
Project.unit<0>.dataChannel<5>=I15/shutter_o
Project.unit<0>.dataChannel<6>=I0/s_busy_from_dut<0>
Project.unit<0>.dataChannel<7>=I0/s_busy_from_dut<1>
Project.unit<0>.dataDepth=2048
Project.unit<0>.dataEqualsTrigger=true
Project.unit<0>.dataPortWidth=13
Project.unit<0>.enableGaps=false
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableTimestamps=false
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.triggerChannel<0><0>=I2/s_coarse_timestamp_h<0>
Project.unit<0>.triggerChannel<0><10>=I0/veto_o
Project.unit<0>.triggerChannel<0><11>=overall_veto
Project.unit<0>.triggerChannel<0><12>=I0/s_IgnoreShutterVeto_s_veto_OR_36_o
Project.unit<0>.triggerChannel<0><13>=
Project.unit<0>.triggerChannel<0><14>=
Project.unit<0>.triggerChannel<0><15>=
Project.unit<0>.triggerChannel<0><1>=I2/s_coarse_timestamp_h<1>
Project.unit<0>.triggerChannel<0><2>=I2/s_coarse_timestamp_h<2>
Project.unit<0>.triggerChannel<0><3>=I2/s_coarse_timestamp_h<3>
Project.unit<0>.triggerChannel<0><4>=I2/s_reset_timestamp_ipbus
Project.unit<0>.triggerChannel<0><5>=I2/s_reset_timestamp_4x
Project.unit<0>.triggerChannel<0><6>=I15/T0_o
Project.unit<0>.triggerChannel<0><7>=I15/shutter_o
Project.unit<0>.triggerChannel<0><8>=I0/s_busy_from_dut<0>
Project.unit<0>.triggerChannel<0><9>=I0/s_busy_from_dut<1>
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerMatchCount<0>=1
Project.unit<0>.triggerMatchCountWidth<0><0>=0
Project.unit<0>.triggerMatchType<0><0>=5
Project.unit<0>.triggerPortCount=1
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortWidth<0>=13
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.type=ilapro
firmware/chipscope/fmc_tlu_chipscope.cpj 0 → 100644
View file @ 395b773e
This diff is collapsed.
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/DUTInterfaces_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/DUTInterfaces_rtl.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/IPBusInterface_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/IPBusInterface_rtl.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/TPx3_iface.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/TPx3_iface.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/arrivalTimeLUT_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/arrivalTimeLUT_rtl.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/dualSERDES_1to4_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/dualSERDES_1to4_rtl.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/eventBuffer_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/eventBuffer_rtl.vhd
\ No newline at end of file
firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/eventFormatter_rtl.vhd 0 → 120000
View file @ 395b773e
../../../../hdl/common/eventFormatter_rtl.vhd
\ No newline at end of file
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