Commit a0d8f423 authored by David Cussans's avatar David Cussans

Adding pulses on T0 and shutter to simulation

parent 9538987b
......@@ -72,7 +72,7 @@ ARCHITECTURE behavior OF fmctlu_v0_1_testbench IS
signal T0_n_i,TPix_Shutter_p_i : std_logic := '1';
signal s_T0 : std_logic := '0'; -- --! Signal to reset timestamp etc.
constant c_T0_delay : time := 200 us; -- --! Delay before T0 is set high
constant c_T0_delay : time := 10 us; -- --! Delay before T0 is set high
constant c_T0_width : time := 400 ns; -- --! Width of T0 high.
-- 200MHz on-board crystal oscillator
......@@ -173,9 +173,10 @@ BEGIN
g_NUM_CHANNELS => 4)
port map (
pulses_o => s_threshold_discr,
numPulses_i => 50,
numPulses_i => 10,
initialDelay_i => 20 us,
averagePulseInterval_i => 10 us,
averagePulseWidth_i => 10 ns,
averagePulseWidth_i => 100 ns,
pulseJitter_i => 2 ns,
sysclock_i => sysclock,
simulationDone_o => open);
......
......@@ -53,6 +53,7 @@ entity pmtPulseGenerator is
pulses_o : out std_logic_vector(g_NUM_CHANNELS-1 downto 0); --! Output pulses
-- pulseRecord_o : out t_pulseRecord ; --! Record describing the output pulses
numPulses_i : in positive; --! Number of pulses/events to generate
initialDelay_i : in time; --! Time to wait before starting pulses
averagePulseInterval_i : in time; --! Mean interval between pulses
averagePulseWidth_i : in time; --! Mean pulse width (must be smaller than interval)
pulseJitter_i : in time; --! Time spread between outputs.
......@@ -64,7 +65,7 @@ end pmtPulseGenerator;
ARCHITECTURE behavior OF pmtPulseGenerator IS
signal s_masterPulse : std_logic := '0';
BEGIN
-- Generate "master" pulse
......@@ -73,7 +74,7 @@ BEGIN
variable v_seed2 : POSITIVE := 17;
variable v_pulseWidth , v_pulseLow : time ;
variable Rand : real;
variable v_pulseCounter : integer := 0; -- Number of pulses issued
begin
assert ( averagePulseInterval_i > averagePulseWidth_i ) report "Pulse width can't be larger than pulse interval!!" severity failure;
......@@ -81,6 +82,10 @@ BEGIN
simulationDone_o <= False;
s_masterPulse <= '0';
-- Wait before starting triggers.
wait for initialDelay_i;
-- Loop round issuing triggers.
for I in 1 to numPulses_i loop
-- wait for random gap between pulses
......@@ -96,7 +101,9 @@ BEGIN
wait for v_pulseWidth;
s_masterPulse <= '0'; --! Return pulse low.
v_pulseCounter := v_pulseCounter +1 ;
report "just output pulse " & integer'image(v_pulseCounter) severity note;
end loop;
simulationDone_o <= True;
......
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