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AIDA-2020 TLU
Commit bc0f68cf authored by David Cussans's avatar David Cussans
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Checking in files to build simulation

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firmware/simulation/scripts/setup.sh
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#!/bin/sh
export MODELSIM_ROOT="/software/CAD/Mentor/2013_2014/Questa/HDS_2012.2b/questasim/"
export ISE_VHDL_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/vhdl/questasim/10.2c_5/lin64/"
export ISE_VLOG_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/verilog/questasim/10.2c_5/lin64/"
#export MODELSIM_ROOT="/software/CAD/Mentor/2013_2014/Questa/HDS_2012.2b/questasim/"
export MODELSIM_ROOT="/eda/mentor/2014-15/RHELx86/QUESTA-SV-AFV_10.4/questasim/"
export ISE_VHDL_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/vhdl/questasim/10.4/lin64/"
export ISE_VLOG_MTI="/software/CAD/Xilinx/14.7_64b/14.7/ISE_DS/ISE/verilog/questasim/10.4/lin64/"
export FW_WORKSPACE=../../../..
vsim -c -do $REPOS_FW_DIR/ipbus/firmware/sim/scripts/setup_project.tcl
cp -r $REPOS_FW_DIR/ipbus/firmware/ethernet/sim/modelsim_fli ./
vsim -c -do add_files.tcl
cp -r ../../../../workspace/ipbus/firmware/ethernet/sim/modelsim_fli ./
cd modelsim_fli
./mac_fli_compile.sh
cd ..
......
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