* Changed TPx3_iface_rtl.vhd to

T0_Shutter_Iface_rtl.vhd (which doesn't expect external shutter/T0 signals) * Edited setup_project.tcl to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited sp605_FMC_mTLU_v1a.ucf to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited fmc_tlu_chipscope.cdc to change connections associated with change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd

* Changed TPx3_iface_rtl.vhd to
T0_Shutter_Iface_rtl.vhd (which doesn't expect external shutter/T0 signals) * Edited setup_project.tcl to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited sp605_FMC_mTLU_v1a.ucf to reflect change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd * Edited fmc_tlu_chipscope.cdc to change connections associated with change from TPx3_iface_rtl.vhd --> T0_Shutter_Iface_rtl.vhd
492f0ddc · David Cussans · 1e3f7365 · 492f0ddc · 492f0ddc · 492f0ddc
Commit 492f0ddc authored Aug 26, 2015 by David Cussans
11 changed files
--- a/firmware/chipscope/fmc_tlu_chipscope.cdc
+++ b/firmware/chipscope/fmc_tlu_chipscope.cdc
 #ChipScope Core Inserter Project File Version 3.0
-#Mon May 11 10:50:57 BST 2015
-Project.device.designInputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/top_extphy_cs.ngc
-Project.device.designOutputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/top_extphy_cs.ngc
+#Wed Aug 26 14:56:41 BST 2015
+Project.device.designInputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_modify_tpix3_nov14_aug15/workspace/top_extphy_cs.ngc
+Project.device.designOutputFile=/users/phdgc/IPBus_stuff/fmc_tlu_test_modify_tpix3_nov14_aug15/workspace/top_extphy_cs.ngc
 Project.device.deviceFamily=18
 Project.device.enableRPMs=true
-Project.device.outputDirectory=/users/phdgc/IPBus_stuff/fmc_tlu_test_tpix3_nov14/workspace/_ngo
+Project.device.outputDirectory=/users/phdgc/IPBus_stuff/fmc_tlu_test_modify_tpix3_nov14_aug15/workspace/_ngo
 Project.device.useSRL16=true
-Project.filter.dimension=16
-Project.filter<0>=*ignore*
-Project.filter<10>=*s_coarse_timestamp_h*
-Project.filter<11>=*reset_timestamp*
-Project.filter<12>=*coarse_timestamp_h*
-Project.filter<13>=*coarse*
-Project.filter<14>=*clk*
-Project.filter<15>=clk*
-Project.filter<1>=I2/s_coarse_timestamp_h*
-Project.filter<2>=I2/*ignore*
-Project.filter<3>=I2/*coarse_timestamp*
-Project.filter<4>=*coarse_timestamp*
-Project.filter<5>=*veto*
-Project.filter<6>=
-Project.filter<7>=*busy*
-Project.filter<8>=*shutter*
-Project.filter<9>=*T0*
+Project.filter.dimension=18
+Project.filter<0>=I0/*busy*
+Project.filter<10>=*coarse_timestamp*
+Project.filter<11>=*veto*
+Project.filter<12>=*s_coarse_timestamp_h*
+Project.filter<13>=*reset_timestamp*
+Project.filter<14>=*coarse_timestamp_h*
+Project.filter<15>=*coarse*
+Project.filter<16>=*clk*
+Project.filter<17>=clk*
+Project.filter<1>=*busy*
+Project.filter<2>=*shutter*
+Project.filter<3>=*T0*
+Project.filter<4>=T0
+Project.filter<5>=
+Project.filter<6>=*ignore*
+Project.filter<7>=I2/s_coarse_timestamp_h*
+Project.filter<8>=I2/*ignore*
+Project.filter<9>=I2/*coarse_timestamp*
 Project.icon.boundaryScanChain=1
 Project.icon.enableExtTriggerIn=false
 Project.icon.enableExtTriggerOut=false
@@ -32,13 +34,18 @@ Project.unit.dimension=1
 Project.unit<0>.clockChannel=clk_4x_logic
 Project.unit<0>.clockEdge=Rising
 Project.unit<0>.dataChannel<0>=I2/s_coarse_timestamp_h<0>
+Project.unit<0>.dataChannel<10>=I0/veto_o
+Project.unit<0>.dataChannel<11>=overall_veto
+Project.unit<0>.dataChannel<12>=I0/s_IgnoreShutterVeto_s_veto_OR_36_o
 Project.unit<0>.dataChannel<1>=I2/s_coarse_timestamp_h<1>
-Project.unit<0>.dataChannel<2>=I2/s_reset_timestamp_ipbus
-Project.unit<0>.dataChannel<3>=I2/s_reset_timestamp_4x
-Project.unit<0>.dataChannel<4>=I15/T0_o
-Project.unit<0>.dataChannel<5>=I15/shutter_o
-Project.unit<0>.dataChannel<6>=I0/s_busy_from_dut<0>
-Project.unit<0>.dataChannel<7>=I0/s_busy_from_dut<1>
+Project.unit<0>.dataChannel<2>=I2/s_coarse_timestamp_h<2>
+Project.unit<0>.dataChannel<3>=I2/s_coarse_timestamp_h<3>
+Project.unit<0>.dataChannel<4>=I2/s_reset_timestamp_ipbus
+Project.unit<0>.dataChannel<5>=I2/s_reset_timestamp_4x
+Project.unit<0>.dataChannel<6>=I15/T0_o
+Project.unit<0>.dataChannel<7>=I15/shutter_o
+Project.unit<0>.dataChannel<8>=I0/s_busy_from_dut<0>
+Project.unit<0>.dataChannel<9>=I0/s_busy_from_dut<1>
 Project.unit<0>.dataDepth=2048
 Project.unit<0>.dataEqualsTrigger=true
 Project.unit<0>.dataPortWidth=13
@@ -48,19 +55,16 @@ Project.unit<0>.enableTimestamps=false
 Project.unit<0>.timestampDepth=0
 Project.unit<0>.timestampWidth=0
 Project.unit<0>.triggerChannel<0><0>=I2/s_coarse_timestamp_h<0>
-Project.unit<0>.triggerChannel<0><10>=I0/veto_o
-Project.unit<0>.triggerChannel<0><11>=overall_veto
-Project.unit<0>.triggerChannel<0><12>=I0/s_IgnoreShutterVeto_s_veto_OR_36_o
-Project.unit<0>.triggerChannel<0><13>=
-Project.unit<0>.triggerChannel<0><14>=
-Project.unit<0>.triggerChannel<0><15>=
+Project.unit<0>.triggerChannel<0><10>=I0/s_busy_from_dut<2>
+Project.unit<0>.triggerChannel<0><11>=I0/veto_o
+Project.unit<0>.triggerChannel<0><12>=overall_veto
 Project.unit<0>.triggerChannel<0><1>=I2/s_coarse_timestamp_h<1>
 Project.unit<0>.triggerChannel<0><2>=I2/s_coarse_timestamp_h<2>
 Project.unit<0>.triggerChannel<0><3>=I2/s_coarse_timestamp_h<3>
 Project.unit<0>.triggerChannel<0><4>=I2/s_reset_timestamp_ipbus
 Project.unit<0>.triggerChannel<0><5>=I2/s_reset_timestamp_4x
-Project.unit<0>.triggerChannel<0><6>=I15/T0_o
-Project.unit<0>.triggerChannel<0><7>=I15/shutter_o
+Project.unit<0>.triggerChannel<0><6>=I10/T0_o
+Project.unit<0>.triggerChannel<0><7>=I10/shutter_o
 Project.unit<0>.triggerChannel<0><8>=I0/s_busy_from_dut<0>
 Project.unit<0>.triggerChannel<0><9>=I0/s_busy_from_dut<1>
 Project.unit<0>.triggerConditionCountWidth=0

--- a/firmware/config/ise14/sp605/setup_project.tcl
+++ b/firmware/config/ise14/sp605/setup_project.tcl
@@ -128,7 +128,8 @@ xfile add fmc-mtlu/firmware/hdl/test/clock_divider_s6.v
 xfile add fmc-mtlu/firmware/hdl/common/counterWithReset_rtl.vhd
 xfile add fmc-mtlu/firmware/hdl/common/synchronizeRegisters_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
-xfile add fmc-mtlu/firmware/hdl/common/TPx3_iface_rtl.vhd
+#xfile add fmc-mtlu/firmware/hdl/common/TPx3_iface_rtl.vhd
+xfile add fmc-mtlu/firmware/hdl/common/T0_Shutter_Iface_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
 #xfile add fmc-mtlu/firmware/hdl/common/counterDown.vhd
 xfile add fmc-mtlu/firmware/hdl/common/pulseClockDomainCrossing_rtl.vhd
@@ -150,7 +151,7 @@ xfile add ipbus/firmware/sim/hdl/clock_sim.vhd
 xfile add ipbus/firmware/ethernet/sim/eth_mac_sim.vhd

 # Add user constraints file
-xfile add fmc-mtlu/firmware/ucf/sp605_FMC_mTLU_v1a_tpixJ2.ucf
+xfile add fmc-mtlu/firmware/ucf/sp605_FMC_mTLU_v1a.ucf
 # sp605_FMC_mTLU_v1a.ucf

 # Add chipscope definition file.

--- a/firmware/hdl/common/T0_Shutter_Iface_rtl.vhd
+++ b/firmware/hdl/common/T0_Shutter_Iface_rtl.vhd
+--! @file T0_Shutter_Iface_rtl.vhd
+--
+--! @brief Simple module to interface AIDA TLU to LHCb TimePix3 telescope.
+--! Accepts T0 sync signal and shutter signal from telescope and re-transmits.
+--
+--! @details
+--! IPBus address map:
+--! ==================
+--! - 00 - shutter. Bit 0. Output shutter = value of bit-0
+--! - 01 - T0 write to pulse T0.
+--
+--! @author David Cussans
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all;
+
+library unisim;
+use unisim.VComponents.all;
+
+USE work.ipbus.all;
+
+use work.ipbus_reg_types.all;
+
+
+entity T0_Shutter_Iface is
+
+  port (
+    clk_4x_i      : in  std_logic;    --! system clock
+    clk_4x_strobe : in  std_logic;    --! strobes high for one cycle every 4 of clk_4x
+    T0_o          : out std_logic;    --! T0 signal retimed onto system clock
+    shutter_o          : out std_logic;    --! shutter signal retimed onto system clock
+
+    ipbus_clk_i            : IN     std_logic; --! IPBus system clock
+    ipbus_i                : IN     ipb_wbus;
+    ipbus_o                : OUT    ipb_rbus
+          
+    );     
+
+end entity T0_Shutter_Iface;
+
+architecture rtl of T0_Shutter_Iface is
+
+  signal s_T0 , s_T0_d1 , s_T0_d2 , s_stretch_T0_in: std_logic := '0';  -- signal after IBufDS and sampled onto clk_4x
+  signal s_stretch_T0_in_sr : std_logic_vector(2 downto 0) := "111"; --! Gets shifted out by clk_4x logic. Loaded by T0ger_i
+  signal s_T0_out_sr : std_logic_vector(2 downto 0) := "111"; --! Gets shifted out by clk_4x logic. Loaded by strobe_4x_logic
+
+  signal s_shutter , s_shutter_d1 , s_shutter_d2 : std_logic := '0';  -- signal after IBufDS and sampled onto clk_4x
+
+  signal s_T0_ipbus , s_T0_ipbus_d1 , s_T0_ipbus_d2: std_logic := '0';  -- Signals that get combined with incoming hardware signals from TPIx3 telescope
+  signal s_shutter_ipbus , s_shutter_ipbus_d1 , s_shutter_ipbus_d2: std_logic := '0';  -- Signals that get combined with incoming hardware signals from TPIx3 telescope
+  signal s_external_signal_mask : std_logic_vector(ipbus_i.ipb_wdata'range) := ( others => '0'); --! Set bits to mask external signals : 0 to mask external T0 , set bit 1 to mask external shutter
+                                                                             
+  signal s_ipbus_ack      : std_logic := '0';  -- used to produce a delayed IPBus ack signal
+  
+begin  -- architecture rtl
+
+  --------------------
+  ipbus_write: process (ipbus_clk_i)
+  begin  -- process ipb_clk_i
+    if rising_edge(ipbus_clk_i) then
+
+      s_T0_ipbus <= '0';
+      if (ipbus_i.ipb_strobe = '1' and ipbus_i.ipb_write = '1') then
+
+        case ipbus_i.ipb_addr(1 downto 0) is
+          when "00" => s_shutter_ipbus <= ipbus_i.ipb_wdata(0) ; -- Set IPBus shutter
+          when "01" => s_T0_ipbus <= '1';
+          when "10" => s_external_signal_mask <= ipbus_i.ipb_wdata;
+          when others => null;
+        end case;
+          
+       end if;
+
+       s_ipbus_ack <= ipbus_i.ipb_strobe and not s_ipbus_ack;
+       
+    end if;
+  end process ipbus_write;
+
+  ipbus_o.ipb_ack <= s_ipbus_ack;
+  ipbus_o.ipb_err <= '0';
+
+
+    ------------------
+    
+        
+    p_T0_retime: process (clk_4x_i , clk_4x_strobe , s_T0) is
+    begin  -- process p_T0_retime
+      if rising_edge(clk_4x_i)  then
+
+        
+        -- Register IPBus clocked signals onto clk 4x. So clk4x must be faster
+        -- than ipbus_clk for this to work.
+        s_T0_ipbus_d1 <= s_T0_ipbus;
+        s_T0_ipbus_d2 <= s_T0_ipbus_d1;
+
+        -- Shutter is a DC level, so clock speeds don't matter.
+        s_shutter_ipbus_d1 <= s_shutter_ipbus;
+        s_shutter_ipbus_d2 <= s_shutter_ipbus_d1;
+      
+      
+      -- Stretch T0_i pulse to 4 clock cycles on clk4x
+      if ( s_T0_ipbus_d2 = '1' ) then
+        s_stretch_T0_in <= '1';
+        s_stretch_T0_in_sr <= "111";
+      else
+        s_stretch_T0_in <= s_stretch_T0_in_sr(0);
+        s_stretch_T0_in_sr <= '0' & s_stretch_T0_in_sr(s_stretch_T0_in_sr'left downto 1);
+      end if;
+
+      -- 
+      if (clk_4x_strobe  = '1') and ( s_stretch_T0_in = '1' ) then
+        T0_o <= '1';
+        s_T0_out_sr <= "111";
+      else
+        T0_o <= s_T0_out_sr(0);
+        s_T0_out_sr <= '0' & s_T0_out_sr(s_T0_out_sr'left downto 1);
+      end if;
+
+      
+    end if;
+  end process p_T0_retime;
+    
+  -- Just retime onto the 4x clock. Probably should retime onto 1x clock.
+  p_shutter_retime: process (s_shutter , clk_4x_i) is
+  begin  -- process p_shutter_retime
+    if rising_edge(clk_4x_i)  then
+      s_shutter_d1 <= ( s_shutter_ipbus );
+      s_shutter_d2 <= s_shutter_d1;
+      shutter_o    <= s_shutter_d2;
+    end if;
+  end process p_shutter_retime;
+
+end architecture rtl;
--- a/firmware/hdl/miniTLU/top_extphy_struct.vhd
+++ b/firmware/hdl/miniTLU/top_extphy_struct.vhd
@@ -2,7 +2,7 @@
 --
 -- Created:
 --          by - phdgc.users (voltar.phy.bris.ac.uk)
--          at - 13:09:17 05/13/15
+--          at - 13:20:39 08/26/15
 --
 -- Generated by Mentor Graphics' HDL Designer(TM) 2013.1b (Build 2)
 --
@@ -12,7 +12,7 @@ USE ieee.numeric_std.all;

 ENTITY top_extphy IS
   GENERIC( 
-      g_NUM_DUTS            : positive := 2;
+      g_NUM_DUTS            : positive := 3;
      g_NUM_TRIG_INPUTS     : positive := 4;
      g_NUM_EXT_SLAVES      : positive := 8;      --! Number of slaves outside IPBus interface
      g_EVENT_DATA_WIDTH    : positive := 64;
@@ -22,10 +22,6 @@ ENTITY top_extphy IS
      g_BUILD_SIMULATED_MAC : integer  := 0
   );
   PORT( 
-      T0_n_i              : IN     std_logic;
-      T0_p_i              : IN     std_logic;                                        --! T0 synchronization from TimePix telescope
-      TPix_Shutter_n_i    : IN     std_logic;                                        --! Shutter signal from TimePix telescope
-      TPix_Shutter_p_i    : IN     std_logic;                                        --! Shutter signal from TimePix telescope
      busy_n_i            : IN     std_logic_vector (g_NUM_DUTS-1 DOWNTO 0);
      busy_p_i            : IN     std_logic_vector (g_NUM_DUTS-1 DOWNTO 0);         --! Busy lines from DUTs ( active high )
      cfd_discr_n_i       : IN     std_logic_vector (g_NUM_TRIG_INPUTS-1 DOWNTO 0);
@@ -69,7 +65,7 @@ END ENTITY top_extphy ;
 --
 -- Created:
 --          by - phdgc.users (voltar.phy.bris.ac.uk)
--          at - 13:18:44 05/13/15
+--          at - 13:20:39 08/26/15
 --
 -- Generated by Mentor Graphics' HDL Designer(TM) 2013.1b (Build 2)
 --
@@ -84,6 +80,7 @@ USE work.ipbus.all;
 USE work.fmcTLU.all;
 LIBRARY unisim;
 USE unisim.vcomponents.all;
+USE work.ipbus_reg_types.all;


 ARCHITECTURE struct OF top_extphy IS
@@ -193,21 +190,17 @@ ARCHITECTURE struct OF top_extphy IS
      clk_logic_xtal_o : OUT    std_logic 
   );
   END COMPONENT IPBusInterface;
-   COMPONENT TPx3_iface
+   COMPONENT T0_Shutter_Iface
   PORT (
-      T0_n_i        : IN     std_logic;
-      T0_p_i        : IN     std_logic;
-      clk_4x_i      : IN     std_logic;
-      clk_4x_strobe : IN     std_logic;
-      ipbus_clk_i   : IN     std_logic;
-      ipbus_i       : IN     ipb_wbus;
-      shutter_n_i   : IN     std_logic;
-      shutter_p_i   : IN     std_logic;
-      T0_o          : OUT    std_logic;
-      ipbus_o       : OUT    ipb_rbus;
-      shutter_o     : OUT    std_logic
+      clk_4x_i      : IN     std_logic ; --! system clock
+      clk_4x_strobe : IN     std_logic ; --! strobes high for one cycle every 4 of clk_4x
+      T0_o          : OUT    std_logic ; --! T0 signal retimed onto system clock
+      shutter_o     : OUT    std_logic ; --! shutter signal retimed onto system clock
+      ipbus_clk_i   : IN     std_logic ; --! IPBus system clock
+      ipbus_i       : IN     ipb_wbus ;
+      ipbus_o       : OUT    ipb_rbus 
   );
-   END COMPONENT TPx3_iface;
+   END COMPONENT T0_Shutter_Iface;
   COMPONENT eventBuffer
   GENERIC (
      g_EVENT_DATA_WIDTH   : positive := 64;
@@ -356,7 +349,7 @@ ARCHITECTURE struct OF top_extphy IS
   -- pragma synthesis_off
   FOR ALL : DUTInterfaces USE ENTITY work.DUTInterfaces;
   FOR ALL : IPBusInterface USE ENTITY work.IPBusInterface;
-   FOR ALL : TPx3_iface USE ENTITY work.TPx3_iface;
+   FOR ALL : T0_Shutter_Iface USE ENTITY work.T0_Shutter_Iface;
   FOR ALL : eventBuffer USE ENTITY work.eventBuffer;
   FOR ALL : eventFormatter USE ENTITY work.eventFormatter;
   FOR ALL : i2c_master USE ENTITY work.i2c_master;
@@ -462,15 +455,11 @@ BEGIN
         dip_switch_i     => dip_switch_i,
         clk_logic_xtal_o => clk_logic_xtal
      );
-   I15 : TPx3_iface
+   I10 : T0_Shutter_Iface
      PORT MAP (
         clk_4x_i      => clk_4x_logic,
         clk_4x_strobe => strobe_4x_logic,
-         T0_p_i        => T0_p_i,
-         T0_n_i        => T0_n_i,
         T0_o          => T0_o,
-         shutter_p_i   => TPix_Shutter_p_i,
-         shutter_n_i   => TPix_Shutter_n_i,
         shutter_o     => s_shutter,
         ipbus_clk_i   => ipbus_clk,
         ipbus_i       => ipbw(7),

--- a/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/T0_Shutter_Iface_rtl.vhd
+++ b/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/T0_Shutter_Iface_rtl.vhd
+../../../../hdl/common/T0_Shutter_Iface_rtl.vhd
\ No newline at end of file
--- a/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/.xrf/top_extphy_struct.xrf
+++ b/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/.xrf/top_extphy_struct.xrf
--- a/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/struct.bd
+++ b/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/struct.bd
--- a/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/struct.bd.bak
+++ b/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/struct.bd.bak
@@ -400,7 +400,7 @@ value "users"
 )
 (vvPair
 variable "graphical_source_time"
-value "13:12:22"
+value "13:16:54"
 )
 (vvPair
 variable "group"
@@ -520,7 +520,7 @@ value "struct"
 )
 (vvPair
 variable "time"
-value "13:16:54"
+value "13:18:44"
 )
 (vvPair
 variable "unit"
@@ -18496,9 +18496,9 @@ va (VaSet
 vasetType 3
 lineWidth 2
 )
-xt "57000,53000,80000,58000"
+xt "56000,53000,80000,58000"
 pts [
-"57000,58000"
+"56000,58000"
 "80000,58000"
 "80000,53000"
 "78750,53000"
@@ -18520,9 +18520,9 @@ uid 18925,0
 va (VaSet
 font "courier,8,0"
 )
-xt "58750,57100,75250,58000"
+xt "57750,57100,74250,58000"
 st "ipbr(7) : (g_NUM_EXT_SLAVES-1:0)"
-blo "58750,57800"
+blo "57750,57800"
 tm "WireNameMgr"
 )
 )
@@ -18650,8 +18650,8 @@ tm "BdCompilerDirectivesTextMgr"
 ]
 associable 1
 )
-windowSize "207,64,1940,1119"
-viewArea "45647,37442,170977,113138"
+windowSize "524,145,2257,1200"
+viewArea "-1248,13538,124082,89234"
 cachedDiagramExtent "-13000,0,516964,485495"
 pageSetupInfo (PageSetupInfo
 fileName "/automount/users/phdgc/hdl_designer_test_print_1.ps"

--- a/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/symbol.sb
+++ b/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hds/top_extphy/symbol.sb
--- a/firmware/scripts/setup_workspace.sh
+++ b/firmware/scripts/setup_workspace.sh
@@ -16,7 +16,7 @@ export FW_WORKSPACE=`pwd`
 echo "Current directory = " $FW_WORKSPACE
 export BOARD_TYPE=sp605
 export ISE_VER=ise14
-export VERSION=trunk
+export VERSION=branches/DCussans_modified_tpix3

 echo "Setting up AIDA mini-TLU code version $VERSION"


--- a/firmware/ucf/sp605_FMC_mTLU_v1a.ucf
+++ b/firmware/ucf/sp605_FMC_mTLU_v1a.ucf
@@ -79,53 +79,66 @@ NET "i2c_sda_b" LOC = R22;
 #
 # I/O to devices under test

+############ BUSY ############################################
 ##  "FMC_LA19_P"  ,  H22  on FMC
-NET "busy_p_i[0]" LOC = R11;
-##  "FMC_LA12_P"  ,  G15  on FMC
-NET "busy_p_i[1]" LOC = H13;
+NET "busy_p_i[0]" LOC = R11; # RJ45 , J3
+
+##  "FMC_LA07_CC_P"  ,  H13  on FMC
+NET "busy_p_i[2]" LOC = H13;  #  mHDMI , J2
+
 ##  "FMC_LA14_P"  ,  C18  on FMC
-# Hack to communicate with TPix3 telescope
-#NET "busy_p_i[2]" LOC = C17;
-NET "T0_p_i" LOC = C17; # seems to be swapped with shutter
-#NET "T0_p_i" LOC = T12; # after swapping
+NET "busy_p_i[1]" LOC = C17; # mHDMI , J1
+
+########### TRIGGER ##########################################

 ##  "FMC_LA20_P"  ,  G21  on FMC
-NET "triggers_p_o[0]" LOC = R9;
+NET "triggers_p_o[0]" LOC = R9; # RJ45 , J3
+
 ##  "FMC_LA16_P"  ,  G18  on FMC
-NET "triggers_p_o[1]" LOC = C5;
+NET "triggers_p_o[2]" LOC = C5; #  mHDMI , J2 
+
 ##  "FMC_LA03_P"  ,  G9  on FMC
-# Hack to communicate with TPix3 telescope
-#NET "triggers_p_o[2]" LOC = B18;
+NET "triggers_p_o[1]" LOC = B18; # mHDMI , J1
+
+########### SPARE #############################################

-# Connector J2 used by TPix connection
 #NET "SPARE_N_O<1>"  LOC = "A20"; ##  "FMC_LA08_N"  ,  G13  on FMC
 #NET "SPARE_P_O<1>"  LOC = "B20"; ##  "FMC_LA08_P"  ,  G12  on FMC
+#NET "shutter_to_dut_n_o[1]"  LOC = "A20"; ##  "FMC_LA08_N"  ,  G13  on FMC
+#NET "shutter_to_dut_p_o[1]"  LOC = "B20"; ##  "FMC_LA08_P"  ,  G12  on FMC
+NET "shutter_to_dut_p_o[1]"  LOC = "T12"; ##  "FMC_LA18_P"  ,  C22  on FMC # mHDMI , J1

+# Connector J2 used by TPix connection
 #NET "SPARE_N_O<2>"  LOC = "G15"; ##  "FMC_LA11_N"  ,  H17  on FMC
 #NET "SPARE_P_O<2>"  LOC = "H14"; ##  "FMC_LA11_P"  ,  H16  on FMC
-NET "shutter_to_dut_n_o[1]"  LOC = "G15"; ##  "FMC_LA11_N"  ,  H17  on FMC
-NET "shutter_to_dut_p_o[1]"  LOC = "H14"; ##  "FMC_LA11_P"  ,  H16  on FMC
+NET "shutter_to_dut_p_o[2]"  LOC = "H14"; ##  "FMC_LA11_P"  ,  H16  on FMC # mHDMI , J2

+############ DUT_CLK ###########################################
 # Labelled DUT_CLK on schematic for RJ45, CLK on HDMI
 ##  "FMC_LA27_P"  ,  C26  on FMC
-NET "dut_clk_p_o[0]" LOC = AA10;
+NET "dut_clk_p_o[1]" LOC = AA10;  # mHDMI , J1
+
 ##  "FMC_LA21_P"  ,  H25  on FMC
-NET "dut_clk_p_o[1]" LOC = V11;
-##  "FMC_LA02_P"  ,  H7  on FMC
-# Hack to communicate with TPix3 telescope
-#NET "dut_clk_p_o[2]" LOC = G8;
+NET "dut_clk_p_o[0]" LOC = V11; # RJ45 , J3

+##  "FMC_LA02_P"  ,  H7  on FMC
+NET "dut_clk_p_o[2]" LOC = G8; #  mHDMI , J2 

+############# CONT ##############################################
 # Labelled CONT on schematic.
 ##  "FMC_LA22_P"  ,  G24  on FMC
-NET "reset_or_clk_p_o[0]" LOC = V7;
-##  "FMC_LA07_CC_P"  ,  H13  on FMC
-NET "reset_or_clk_p_o[1]" LOC = B2;
+NET "reset_or_clk_p_o[0]" LOC = V7; # RJ45 , J3
+
 ##  "FMC_LA18_P"  ,  C22  on FMC
-# Hack to communicate with TPix3 telescope
-#D NET "reset_or_clk_p_o[2]" LOC = T12;
-NET "TPix_Shutter_p_i" LOC = T12; # Seems to be swapped with T0....
-#NET "TPix_Shutter_p_i" LOC = C17; # after swapping.
+#NET "reset_or_clk_p_o[1]" LOC = T12; # mHDMI , J1
+NET "reset_or_clk_p_o[1]" LOC = B20; # "FMC_LA08_P"  ,  G12  on FMC , mHDMI , J1
+
+##  "FMC_LA07_CC_P"  ,  H13  on FMC
+NET "reset_or_clk_p_o[2]" LOC = B2;  # "FMC_LA07_CC_P"  ,  H13  on FMC , mHDMI , J2 
+
+
+
+##################################################################

 # Trigger Inputs