- 11 May, 2021 2 commits
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Christos Gentsos authored
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Christos Gentsos authored
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- 06 May, 2021 2 commits
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Christos Gentsos authored
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brecordo authored
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- 24 Nov, 2020 2 commits
- 23 Nov, 2020 1 commit
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billerea authored
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- 16 Nov, 2020 5 commits
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- 13 Nov, 2020 7 commits
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Christos Gentsos authored
The 12V doesn't come until the P3V3_SBY is up, as that's what powers the PSU_ON_N signal generation.
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- 12 Nov, 2020 4 commits
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- 11 Nov, 2020 10 commits
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Christos Gentsos authored
Now that they're connected directly to the FPGA (no level shifter) we need the pull-ups.
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- 10 Nov, 2020 6 commits
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
This essentially completes the "embedding" of the monitoring part of the MoniMod - it's the whole MoniMod minus the fan control.
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- 09 Nov, 2020 1 commit
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Christos Gentsos authored
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