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DIOT Igloo2-based radiation-tolerant System Board
DIOT Igloo2-based radiation-tolerant System Board
Commit e2ba5d69 authored by Christos Gentsos's avatar Christos Gentsos
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Power Bank 2 with 3.3V, removing many level shifters (closes #61)

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hw/DIOT-sb-igl.PrjPcb
View file @ e2ba5d69
......@@ -412,40 +412,6 @@ GenerateClassCluster=0
DocumentUniqueId=
[Document23]
DocumentPath=Schematics\Translate_GPIO_to_2V5.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=18
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=ATODZFGW
[Document24]
DocumentPath=Schematics\Translate_GPIO_to_2V5.Harness
AnnotationEnabled=1
AnnotateStartValue=1
AnnotationIndexControlEnabled=0
AnnotateSuffix=
AnnotateScope=All
AnnotateOrder=-1
DoLibraryUpdate=1
DoDatabaseUpdate=1
ClassGenCCAutoEnabled=1
ClassGenCCAutoRoomEnabled=1
ClassGenNCAutoScope=None
DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document25]
DocumentPath=Schematics\FPGA_Banks_6_7.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -462,7 +428,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document26]
[Document24]
DocumentPath=Schematics\Monitoring.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -479,7 +445,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document27]
[Document25]
DocumentPath=DIOT-sb-igl.OutJob
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -496,7 +462,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document28]
[Document26]
DocumentPath=Schematics\JTAG.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -513,7 +479,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document29]
[Document27]
DocumentPath=Schematics\Translate_OD_3V3_to_2V5.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -530,7 +496,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=VWSCYIBF
[Document30]
[Document28]
DocumentPath=Schematics\Constrain_Periph_Nets.SchDoc
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -547,7 +513,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=ERSNRNPT
[Document31]
[Document29]
DocumentPath=Schematics\Constrain_Periph_Nets.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -564,7 +530,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document32]
[Document30]
DocumentPath=Schematics\FMC.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......@@ -581,7 +547,7 @@ DItemRevisionGUID=
GenerateClassCluster=0
DocumentUniqueId=
[Document33]
[Document31]
DocumentPath=Schematics\FPGA_Config.Harness
AnnotationEnabled=1
AnnotateStartValue=1
......
hw/DIOT-sb-igl.PrjPcbStructure
View file @ e2ba5d69
......@@ -13,10 +13,6 @@ Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Banks 1,2|SchDesig
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Banks 6,7|SchDesignator=FPGA Banks 6,7|FileName=FPGA_Banks_6_7.SchDoc|SymbolType=Normal|RawFileName=FPGA_Banks_6_7.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Config|SchDesignator=FPGA Config|FileName=FPGA_Config.SchDoc|SymbolType=Normal|RawFileName=FPGA_Config.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Power|SchDesignator=FPGA Power|FileName=FPGA_Power.SchDoc|SymbolType=Normal|RawFileName=FPGA_Power.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Backplane I2C Translation - SCL|SchDesignator=Backplane I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Backplane I2C Translation - SDA|SchDesignator=Backplane I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=FMC I2C Translation - SCL|SchDesignator=FMC I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=FMC I2C Translation - SDA|SchDesignator=FMC I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod I2C Translation - SCL|SchDesignator=MoniMod I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod I2C Translation - SDA|SchDesignator=MoniMod I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_SERVMOD1|SchDesignator=REPEAT(Voltage_trans_SERVMOD,1,8)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
......@@ -31,10 +27,4 @@ Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_sharedbus2|SchDesignator=REPEAT(Voltage_trans_sharedbus,1,4)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_sharedbus3|SchDesignator=REPEAT(Voltage_trans_sharedbus,1,4)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_sharedbus4|SchDesignator=REPEAT(Voltage_trans_sharedbus,1,4)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Translate GPIO voltages|SchDesignator=Translate GPIO voltages|FileName=Translate_GPIO_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_GPIO_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_sharedbus0|SchDesignator=Voltage_trans_sharedbus0|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Translate_GPIO_to_2V5.SchDoc|Designator=MON-GPIO I2C Translation - SCL|SchDesignator=MON-GPIO I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Translate_GPIO_to_2V5.SchDoc|Designator=MON-GPIO I2C Translation - SDA|SchDesignator=MON-GPIO I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Translate_GPIO_to_2V5.SchDoc|Designator=MON-GPIO I2C Translation - SDA|SchDesignator=MON-GPIO I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Translate_GPIO_to_2V5.SchDoc|Designator=MON-GPIO I2C Translation - SDA|SchDesignator=MON-GPIO I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Translate_GPIO_to_2V5.SchDoc|Designator=MON-GPIO I2C Translation - SDA|SchDesignator=MON-GPIO I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
hw/Schematics/FMC.SchDoc
View file @ e2ba5d69
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hw/Schematics/Translate_GPIO_to_2V5.Harness deleted 100644 → 0
View file @ ac1bf3b8
CRT-GPIO=PRST_N,PWRBTN_N
I2C=SCL,SDA
MON-GPIO={I2C:I2C},P_RST_N,P_IO0,P_IO1,P_IO2,F_RST_N,F_IO0,F_IO1,PWR_FAIL_N,P_PRES0,P_PRES1
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