Skip to content

DIOT Igloo2-based radiation-tolerant System Board
DIOT Igloo2-based radiation-tolerant System Board
Commit 43f2d7ec authored by Christos Gentsos's avatar Christos Gentsos
Browse files
Options

Add I2C PCB revision and 1-Wire board ID (closes #33)

parent e2ba5d69
Hide whitespace changes
Inline Side-by-side
Showing with 2 additions and 0 deletions
hw/DIOT-sb-igl.PrjPcbStructure
View file @ 43f2d7ec
......@@ -15,6 +15,8 @@ Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Config|SchDesignat
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA Power|SchDesignator=FPGA Power|FileName=FPGA_Power.SchDoc|SymbolType=Normal|RawFileName=FPGA_Power.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod I2C Translation - SCL|SchDesignator=MoniMod I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=MoniMod I2C Translation - SDA|SchDesignator=MoniMod I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=PCB_VER I2C Translation - SCL|SchDesignator=PCB_VER I2C Translation - SCL|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=PCB_VER I2C Translation - SDA|SchDesignator=PCB_VER I2C Translation - SDA|FileName=Translate_OD_3V3_to_2V5.SchDoc|SymbolType=Normal|RawFileName=Translate_OD_3V3_to_2V5.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_SERVMOD1|SchDesignator=REPEAT(Voltage_trans_SERVMOD,1,8)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_SERVMOD2|SchDesignator=REPEAT(Voltage_trans_SERVMOD,1,8)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA_Banks_1_2.SchDoc|Designator=Voltage_trans_SERVMOD3|SchDesignator=REPEAT(Voltage_trans_SERVMOD,1,8)|FileName=Translate_2V5_to_PPERIPH_1b.SchDoc|SymbolType=Normal|RawFileName=Translate_2V5_to_PPERIPH_1b.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment