- 14 Mar, 2022 1 commit
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Tristan Gingold authored
Improve testsuite on windows
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- 10 Mar, 2022 2 commits
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Tristan Gingold authored
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Tristan Gingold authored
[fix][testsuite][vivado] Adjust Testsuite to !14 See merge request !15
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- 09 Mar, 2022 1 commit
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Istvan Kiss authored
Adjust testsuite to match mergerequest!14. Testsuite passes on native Linux.
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- 09 Feb, 2022 1 commit
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Tristan Gingold authored
Add missing dir to Vivado clean targets See merge request !14
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- 05 Feb, 2022 1 commit
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Brian Koropoff authored
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- 26 Jan, 2022 6 commits
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Tristan Gingold authored
makefile: make synthesis depend on source files See merge request !13
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Brian Koropoff authored
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Brian Koropoff authored
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Brian Koropoff authored
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Brian Koropoff authored
When set to False, timing failures are ignored during implementation
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Brian Koropoff authored
This causes synthesis failures with verilog files that import from each other.
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- 12 Jan, 2022 3 commits
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Tristan Gingold authored
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Tristan Gingold authored
For #117
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Tristan Gingold authored
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- 15 Dec, 2021 1 commit
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Tristan Gingold authored
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- 30 Nov, 2021 1 commit
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Tristan Gingold authored
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- 26 Nov, 2021 4 commits
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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- 25 Nov, 2021 1 commit
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Tristan Gingold authored
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- 18 Nov, 2021 3 commits
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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- 20 Oct, 2021 4 commits
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
The same unit can be defined in several files. This is not (yet) considered as an error as it happens in existing designs. Now, only the first definition is considered. A warning is emitted. This reduces the possibility of non-deterministic behaviour.
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- 19 Oct, 2021 2 commits
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Tristan Gingold authored
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Tristan Gingold authored
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- 30 Jul, 2021 3 commits
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Tristan Gingold authored
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Tristan Gingold authored
Add VHDL library and PolarfireSOC device example to LiberoSOC in hdlmake See merge request !9
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Phil Clarke authored
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- 29 Jul, 2021 6 commits
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Tristan Gingold authored
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Tristan Gingold authored
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Tristan Gingold authored
Add VHDL Library support to GHDL Synthesis See merge request !8
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Phil Clarke authored
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Tristan Gingold authored
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Tristan Gingold authored
Add VHDL Library support to ISE See merge request !7
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