Commits · 0fb163843520479c5ba098ccafeb81c0b6181468 · Projects / FMC ADC 100M 14b 4cha

25 Nov, 2011 1 commit
- Add gain/offset calibration, fix pre/post trigger sample number. · 0fb16384
  mcattin authored Nov 25, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@97 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  0fb16384
23 Nov, 2011 5 commits
- Replace unused bits in registers by reserved. · 39353cd0
  mcattin authored Nov 23, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@96 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  39353cd0
- Add Trigger address register. Filter out trigger pulses outside of WAIT_TRIG state. · c2285a38
  mcattin authored Nov 23, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@95 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  c2285a38
- Add a bit to the FIFO to pass the trigger as well. Reduce FIFO depth to 64 (was 1024). · 89ee4559
  mcattin authored Nov 23, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@94 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  89ee4559
- Replace empty bits in registers by reserved. · cdfee3dd
  mcattin authored Nov 23, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@93 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  cdfee3dd
- Remove utc registers. Add trigger address, gain and offset calibration registers. · e7e2f3c9
  mcattin authored Nov 23, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@92 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  e7e2f3c9
22 Nov, 2011 4 commits
- Fix bug in multi-shot mode. wb_fifo wr_en signal was badly assigned. · 9f574761
  mcattin authored Nov 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@91 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  9f574761
- Fix utc_core addr width and utc coarse counter overflow limit. · 13cce547
  mcattin authored Nov 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@90 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  13cce547
- Add acq_end output to adc_core for irq and time-tag. · 12621ca0
  mcattin authored Nov 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@89 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  12621ca0
- One multiple irq bit per irq source instead of a unique flag. · e948330f
  mcattin authored Nov 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@88 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  e948330f
18 Nov, 2011 3 commits

mcattin authored Nov 18, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@87 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

413ce60d

Add UTC core, IRQ controller and 1-wire for carrier ID/temp to design. · 235c95da
mcattin authored Nov 18, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@86 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
235c95da

Add UTC core and IRQ controller to repo. · 0e9e8084

mcattin authored Nov 18, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@85 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

0e9e8084

17 Nov, 2011 2 commits

Update chipscope project. · 0840bffd

mcattin authored Nov 17, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@84 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

0840bffd

Add utc core registers generated with wbgen2. · 1233efd9

mcattin authored Nov 17, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@83 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

1233efd9

16 Nov, 2011 3 commits
- Add a BUFG on the adc serdes PLL feedback path, add termination on LVDS data line from ADC. · f513a2b9
  mcattin authored Nov 16, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@82 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  f513a2b9
- Commit some chipscope projects. · 1fb0e23d
  mcattin authored Nov 16, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@81 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  1fb0e23d
- Add monostable, ext_pulse_sync and utils_pkg to repo. Where only localy on my pc. · 35758780
  mcattin authored Nov 16, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@80 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  35758780
08 Nov, 2011 1 commit

Add chipscope projects to repo. · dba7b671

mcattin authored Nov 08, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@79 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

dba7b671

07 Nov, 2011 1 commit

Add Manifest for synthesis to repo. · 11461094

mcattin authored Nov 07, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@78 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

11461094

04 Nov, 2011 1 commit
- serdes bitslip process reset by sys_rst (as it was before rev75) · 7203a4a4
  mcattin authored Nov 04, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@77 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  7203a4a4
03 Nov, 2011 2 commits

Add acq FSM states description in .wb · 3a694fd8

mcattin authored Nov 03, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@76 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

3a694fd8

Add monostable on acq LED, all processes of the core now with async reset. NO… · b80794fd

mcattin authored Nov 03, 2011

Add monostable on acq LED, all processes of the core now with async reset. NO WORKING, serdes seems mis-synced.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@75 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

b80794fd

06 Sep, 2011 1 commit
- add manual control for front panel LEDs, change ext trigger min pulse width. · ed969828
  mcattin authored Sep 06, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@73 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  ed969828
26 Aug, 2011 1 commit

Mezzanine 1-wire implemented and working. · bced5daf

mcattin authored Aug 26, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@71 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

bced5daf

12 Aug, 2011 1 commit

Project working with hdlmake in local with ISE 12.2, not in remote with ISE 13.1… · ad44e580

mcattin authored Aug 12, 2011

Project working with hdlmake in local with ISE 12.2, not in remote with ISE 13.1 -> adc serdes not working properly.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@67 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

ad44e580

10 Aug, 2011 5 commits

Reorganise files in dir. · 258a3330

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@66 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

258a3330

Remove useless ise project files. · 8c514a73

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@65 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8c514a73

Remove useless ise dir. · 11574347

mcattin authored Aug 10, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@64 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

11574347

Remove useless ise dir. · 39ea74b2

mcattin authored Aug 10, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@63 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

39ea74b2

Reorganise dirs. · 7577ea5e

mcattin authored Aug 10, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@62 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

7577ea5e

30 Jun, 2011 2 commits

Add top manifest and wbgen cores htm doc. · fa979408

mcattin authored Jun 30, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@60 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

fa979408

Commit before making the project hdl-make compliant. · ea07b855

mcattin authored Jun 30, 2011


git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@59 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

ea07b855

20 Apr, 2011 1 commit

Modified ucf for SPEC V1.1 · 8802f990

mcattin authored Apr 20, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@58 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

8802f990

11 Apr, 2011 1 commit

Bug fix in pre/post trigger counters, was counting even if no valid data out of… · 1d3e6836

mcattin authored Apr 11, 2011

Bug fix in pre/post trigger counters, was counting even if no valid data out of sync fifo. Clear of WB cyc when FSm is IDLE

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@55 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

1d3e6836

01 Apr, 2011 1 commit

Work on multi-shots. · 490dbb38

mcattin authored Apr 01, 2011

Add a testing feature to write the address counter in ddr instead of the ADc data.
Add dpram ip for multi-shots.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@54 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

490dbb38

31 Mar, 2011 1 commit

Add .bit and .bin to repo · 30438d13

mcattin authored Mar 31, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@53 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

30438d13

29 Mar, 2011 1 commit

Wishbone from adc core to ddr now 64-bit data width. · 51ef6665

mcattin authored Mar 29, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@52 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

51ef6665

24 Mar, 2011 1 commit

Add stall management in datapath wb interface. · 4d155222

mcattin authored Mar 24, 2011

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@51 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4

4d155222

22 Mar, 2011 1 commit
- Fix timing issues in spi by adding a FF on the din path. · d31b0d43
  mcattin authored Mar 22, 2011
```
git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@50 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
```
  d31b0d43