Skip to content

F
FMC ADC 100M 14b 4cha - Gateware
Commit ad44e580 authored by mcattin's avatar mcattin
Browse files
Options

Project working with hdlmake in local with ISE 12.2, not in remote with ISE 13.1… 

Project working with hdlmake in local with ISE 12.2, not in remote with ISE 13.1 -> adc serdes not working properly.

git-svn-id: http://svn.ohwr.org/fmc-adc-100m14b4cha/trunk@67 ddd67a1a-c8ad-4635-afe9-0b8a11d8f8e4
parent 258a3330
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 920 additions and 618 deletions
hdl/adc/rtl/Manifest.py 0 → 100644
View file @ ad44e580
files = ["fmc_adc_100Ms_core.vhd",
"fmc_adc_100Ms_csr.vhd"]
hdl/adc/wb_gen/Makefile 0 → 100644
View file @ ad44e580
WBGEN2=~/wbgen2/wishbone-gen/wbgen2
RTL=../rtl/
fmc_adc_100Ms_csr:
$(WBGEN2) -l vhdl -V $(RTL)$@.vhd -D $@.htm -C $@.h $@.wb
\ No newline at end of file
hdl/spec/rtl/Manifest.py
View file @ ad44e580
files = [
"spec_top_fmc_adc_100Ms.vhd",
"fmc_adc_100Ms_csr.vhd"];
"carrier_csr.vhd"];
modules = {
"local" : "../../adc/rtl",
"svn" : [ "http://svn.ohwr.org/ddr3-sp6-core/trunk/hdl/rtl",
"svn" : [ "http://svn.ohwr.org/ddr3-sp6-core/trunk/hdl",
"http://svn.ohwr.org/gn4124-core/trunk/hdl/gn4124core/rtl",
"http://svn.ohwr.org/gn4124-core/trunk/hdl/common/rtl"],
"git" : "git://ohwr.org/hdl-core-lib/general-cores.git"}
......
hdl/spec/rtl/spec_top_fmc_adc_100Ms.vhd
View file @ ad44e580
This diff is collapsed.
hdl/spec/spec_top_fmc_adc_100Ms.ucf
View file @ ad44e580
......@@ -548,8 +548,8 @@ NET "DDR3_DQ[15]" IOSTANDARD = "SSTL15_II";
INST "cmp_gn4124_core/l2p_rdy_t" IOB=FALSE;
INST "cmp_gn4124_core/l_wr_rdy_t*" IOB=FALSE;
INST "cmp_fmc_spi/shift/s_out" IOB=FALSE;
INST "cmp_fmc_spi/clgen/clk_out" IOB=FALSE;
INST "cmp_fmc_spi/cmp_wrapped_spi/shift/s_out" IOB=FALSE;
INST "cmp_fmc_spi/cmp_wrapped_spi/clgen/clk_out" IOB=FALSE;
#===============================================================================
......@@ -572,11 +572,11 @@ NET "DDR3_UDQS_N" IN_TERM = NONE;
# GN4124
NET "L_CLKp" TNM_NET = "l_clkp_grp";
TIMESPEC TS_l_clkp = PERIOD "l_clkp_grp" 6.25 ns HIGH 50%;
TIMESPEC TS_l_clkp = PERIOD "l_clkp_grp" 5 ns HIGH 50%;
NET "P2L_CLKp" TNM_NET = "p2l_clkp_grp";
TIMESPEC TS_p2l_clkp = PERIOD "p2l_clkp_grp" 6.25 ns HIGH 50%;
TIMESPEC TS_p2l_clkp = PERIOD "p2l_clkp_grp" 5 ns HIGH 50%;
NET "P2L_CLKn" TNM_NET = "p2l_clkn_grp";
TIMESPEC TS_p2l_clkn = PERIOD "p2l_clkn_grp" 6.25 ns HIGH 50%;
TIMESPEC TS_p2l_clkn = PERIOD "p2l_clkn_grp" 5 ns HIGH 50%;
# System clock
......@@ -585,7 +585,7 @@ TIMESPEC TS_clk20_vcxo_i = PERIOD "clk20_vcxo_i_grp" 50 ns HIGH 50%;
# DDR3
NET "cmp_ddr_ctrl/cmp_ddr_controller/memc3_infrastructure_inst/sys_clk_ibufg" TNM_NET = "SYS_CLK5";
NET "cmp_ddr_ctrl/cmp_ddr3_ctrl_wrapper/gen_bank3_64b_32b.cmp_ddr3_ctrl/memc3_infrastructure_inst/sys_clk_ibufg" TNM_NET = "SYS_CLK5";
TIMESPEC "TS_SYS_CLK5" = PERIOD "SYS_CLK5" 3.0 ns HIGH 50 %;
# ADC
......@@ -603,7 +603,7 @@ NET "cmp_gn4124_core/rst_*" TIG;
# DDR3
NET "cmp_ddr_ctrl/cmp_ddr_controller/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/selfrefresh_mcb_mode" TIG;
NET "cmp_ddr_ctrl/cmp_ddr_controller/c3_pll_lock" TIG;
NET "cmp_ddr_ctrl/cmp_ddr_controller/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/hard_done_cal" TIG;
NET "cmp_ddr_ctrl/cmp_ddr_controller/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/DONE_SOFTANDHARD_CAL" TIG;
NET "cmp_ddr_ctrl/cmp_ddr3_ctrl_wrapper/gen_bank3_64b_32b.cmp_ddr3_ctrl/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/selfrefresh_mcb_mode" TIG;
NET "cmp_ddr_ctrl/cmp_ddr3_ctrl_wrapper/gen_bank3_64b_32b.cmp_ddr3_ctrl/c3_pll_lock" TIG;
NET "cmp_ddr_ctrl/cmp_ddr3_ctrl_wrapper/gen_bank3_64b_32b.cmp_ddr3_ctrl/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/hard_done_cal" TIG;
NET "cmp_ddr_ctrl/cmp_ddr3_ctrl_wrapper/gen_bank3_64b_32b.cmp_ddr3_ctrl/memc3_wrapper_inst/memc3_mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/DONE_SOFTANDHARD_CAL" TIG;
hdl/spec/syn/spec_fmc_adc_100Ms.xise
View file @ ad44e580
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment