Commits · dba5b08e25ff7dcc7bf2c943139284a398ae2d95 · hdl-core-lib / urv-core · Open Hardware Repository

30 Jan, 2019 1 commit
- isa-testsuite/main.sv: reduce number of tests. · dba5b08e
  Tristan Gingold authored Jan 30, 2019
  
  dba5b08e
28 Jan, 2019 1 commit
- urv: add MIMPID. · 22ee94a4
  Tristan Gingold authored Jan 28, 2019
  
  22ee94a4
25 Jan, 2019 1 commit
- debug/main.sv: adjust after changes in urv_cpu · 773694b6
  Tristan Gingold authored Jan 25, 2019
  
  773694b6
13 Nov, 2018 3 commits
- core: fixed unwanted destination register write when a MUL instruction is… · 4db75631
  Tomasz Wlostowski authored Nov 13, 2018
```
core: fixed unwanted destination register write when a MUL instruction is followed by a stalling instruction
```
  4db75631
- core: more accurate multiply instruction detection in the decoder · d7bc65d4
  Tomasz Wlostowski authored Nov 13, 2018
  
  d7bc65d4
- testsuite: test for mul->mulhu incorrect RD write · f64df50e
  Tomasz Wlostowski authored Nov 13, 2018
  
  f64df50e
17 Jul, 2018 3 commits
- Remove some trailing whitespaces. · 70e9e78f
  Tristan Gingold authored Jul 17, 2018
  
  70e9e78f
- Fix g_with_hw_debug propagation. · 018f9e61
  Tristan Gingold authored Jul 17, 2018
  
  018f9e61
- rtl: update all licenses to solderpad 2 (for files used by MT/masterFIP) · c2d4f0ce
  Dimitris Lampridis authored Jun 08, 2018
  
  c2d4f0ce
08 Jun, 2018 1 commit
- rtl: update all licenses to solderpad 2 (for files used by MT/masterFIP) · 890dfda6
  Dimitris Lampridis authored Jun 08, 2018
  
  890dfda6
05 Jun, 2018 2 commits
- rtl: stall register file on pipeline stall too · 4d6e4c92
  Tomasz Wlostowski authored Jun 05, 2018
  
  4d6e4c92
- rtl: default values for parameters, removed blocking assignments (synthesis fixes) · 261d6b36
  Tomasz Wlostowski authored Jun 05, 2018
  
  261d6b36
21 Apr, 2018 3 commits
- tb: automatized ISA testbench (for all feature variants), initial version · 5cffb670
  Tomasz Wlostowski authored Apr 21, 2018
  
  5cffb670
- sw: correctly emulate divide-by-zero case · ecc50e05
  Tomasz Wlostowski authored Apr 21, 2018
  
  ecc50e05
- RTL: proper support for hardware multiply/divide, including correct divide-by-zero handling. · 49cb85d2
  Tomasz Wlostowski authored Apr 21, 2018
  
  49cb85d2
09 Apr, 2018 1 commit
- rtl: added optional hardware division and multiply-high instruction · a215404d
  Tomasz Wlostowski authored Apr 09, 2018
  
  a215404d
19 Mar, 2018 24 commits
- Run isa testsuite. · 91e88f93
  Tristan Gingold authored Mar 19, 2018
  
  91e88f93
- Remove unused signals, fix some warnings. · 2cf284ed
  Tristan Gingold authored Mar 19, 2018
  
  2cf284ed
- Simplify debug interface. · 134759b2
  Tristan Gingold authored Mar 19, 2018
  
  134759b2
- Minor clean-up. · c701e7ca
  Tristan Gingold authored Mar 19, 2018
  
  c701e7ca
- hdl: disable unused d_is_divide_i port (for now) · 44d69a62
  Dimitris Lampridis authored Mar 19, 2018
  
  44d69a62
- Remove dbg_insn_ready_o. · ddd3a4dc
  Tristan Gingold authored Mar 14, 2018
  
  ddd3a4dc
- Add test to interrupt cpu. · 747a9dc1
  Tristan Gingold authored Mar 13, 2018
  
  747a9dc1
- Simplify fetch. · 16384349
  Tristan Gingold authored Mar 13, 2018
  
  16384349
- Adjust tb connections. · 5cb47d99
  Tristan Gingold authored Mar 13, 2018
  
  5cb47d99
- debug: handle ebreak as a branch. · bd03375c
  Tristan Gingold authored Mar 13, 2018
  
  bd03375c
- debug: can load a program using debug mode. · 0e4dc0d4
  Tristan Gingold authored Mar 13, 2018
  
  0e4dc0d4
- Add test for debug mode. · 6b2e105e
  Tristan Gingold authored Mar 12, 2018
  
  6b2e105e
- Add mailboxes. · b35442fd
  Tristan Gingold authored Mar 12, 2018
  
  b35442fd
- Initial implementation of debug mode. · 2f6df067
  Tristan Gingold authored Mar 12, 2018
  
  2f6df067
- Simplify exceptions; re-enable div & mul tests. · 87d2fe12
  Tristan Gingold authored Mar 09, 2018
  
  87d2fe12
- Use mret instead of eret; reformatting; compile emulate.c · a2c624b3
  Tristan Gingold authored Mar 09, 2018
  
  a2c624b3
- Comments + simplifications. · 5c01900c
  Tristan Gingold authored Mar 08, 2018
  
  5c01900c
- Add comments, minor simplification. · 975a2938
  Tristan Gingold authored Mar 08, 2018
  
  975a2938
- Remove f_kill_i (duplicates x_bra_i). · 79e6133d
  Tristan Gingold authored Mar 08, 2018
  
  79e6133d
- urv_cpu.v: minor reindent. · ddc15f4d
  Tristan Gingold authored Mar 08, 2018
  
  ddc15f4d
- cpu/main.sv: Fix in the disassembler. · f86bdbb7
  Tristan Gingold authored Mar 08, 2018
  
  f86bdbb7
- Add mul test. · ba67f20a
  Tristan Gingold authored Mar 08, 2018
  
  ba67f20a
- Minor comment update + reindent. · d10c36e3
  Tristan Gingold authored Mar 08, 2018
  
  d10c36e3
- Fix cpu testsuite; re-enable the simple test. · a51e59a8
  Tristan Gingold authored Mar 08, 2018
  
  a51e59a8