debug: handle ebreak as a branch.

bd03375c · Tristan Gingold · Dimitris Lampridis · 0e4dc0d4 · bd03375c · bd03375c
Commit bd03375c authored Mar 13, 2018 by Tristan Gingold Committed by Dimitris Lampridis Mar 19, 2018
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Showing with 12 additions and 7 deletions

urv_cpu.v rtl/urv_cpu.v +6 -5

urv_exec.v rtl/urv_exec.v +4 -1

urv_fetch.v rtl/urv_fetch.v +2 -1

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--- a/rtl/urv_cpu.v
+++ b/rtl/urv_cpu.v
@@ -277,11 +277,12 @@ module urv_cpu

      // from D stage
      .d_valid_i(d2x_valid),
-      .d_is_csr_i (d2x_is_csr),
-      .d_is_mret_i (d2x_is_mret),
-      .d_is_ebreak_i (d2x_is_ebreak),
-      .d_csr_imm_i (d2x_csr_imm),
-      .d_csr_sel_i (d2x_csr_sel),
+      .d_is_csr_i(d2x_is_csr),
+      .d_is_mret_i(d2x_is_mret),
+      .d_is_ebreak_i(d2x_is_ebreak),
+      .d_dbg_mode_i(dbg_enabled_o),
+      .d_csr_imm_i(d2x_csr_imm),
+      .d_csr_sel_i(d2x_csr_sel),
      .d_pc_i(d2x_pc),
      .d_rd_i(d2x_rd),
      .d_fun_i(d2x_fun),

--- a/rtl/urv_exec.v
+++ b/rtl/urv_exec.v
@@ -50,6 +50,7 @@ module urv_exec
   input             d_is_csr_i,
   input             d_is_mret_i,
   input             d_is_ebreak_i,
+   input             d_dbg_mode_i,
   input [4:0]       d_csr_imm_i,
   input [11:0]      d_csr_sel_i,

@@ -243,6 +244,8 @@ module urv_exec
       branch_target <= exception_address;
     else if (x_exception)
       branch_target <= `URV_TRAP_VECTOR;
+     else if (d_is_ebreak_i)
+       branch_target <= d_pc_i;
     else
       branch_target <= dm_addr;

@@ -447,7 +450,7 @@ module urv_exec
 	 `OPC_BRANCH:
 	   branch_take <= branch_condition_met;
         `OPC_SYSTEM:
-           branch_take <= d_is_mret_i;
+           branch_take <= d_is_mret_i || (d_is_ebreak_i && !d_dbg_mode_i);
 	 default:
 	   branch_take <= 0;
       endcase // case (d_opcode_i)

--- a/rtl/urv_fetch.v
+++ b/rtl/urv_fetch.v
@@ -101,7 +101,8 @@ module urv_fetch
 	       f_pc_o <= pc;
               pc <= pc_next;

-               if((dbg_force_i || x_dbg_toggle) && !dbg_mode)
+               if(!dbg_mode
+                  && (dbg_force_i || x_dbg_toggle || pipeline_cnt != 0))
                 begin
                    //  Try to enter in debug mode.
                    f_valid_o <= 0;