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peter_spec7_gtx_lp
cae7bb3d
·
update pointer to wr-cores peter_spec7_gtx_lp SHA-1: 9fe22f523646af5c6075da29c58df5ef03541be1
·
Jun 22, 2020
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peter_spec7_v5_xwb_spi
84910cea
·
hdl ref and write design builds for v5
·
Jul 06, 2020
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peter_spec7_v5_pll_sync
dacb987f
·
update even_off proje filelist and sim
·
Aug 31, 2020
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peter_spec7_v5
f11846a0
·
added PS in ref design, adjusted BAR addresses.
·
Sep 22, 2020
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peter_201009_qpll
ecd53d0f
·
switch to kintex7-qpll implementation
·
Oct 09, 2020
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peter_210326
732b5abd
·
added local_pps as notion of time for HPSEC
·
Mar 27, 2021
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peter_210324
b3af795e
·
Choose REFerence of HPSEC design XDC file based in $spec7_design
·
Apr 06, 2021
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peter_210422_align10mhz
9271ae8e
·
set proj_properties.tcl for HPSEC
·
Apr 22, 2021
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spec7_ci
ccbcf7b2
·
Update .gitlab-ci.yml
·
Jun 17, 2021
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spec7_golden_bd_patch
3a7ca5c8
·
initial script version and bd file location.
·
Jun 28, 2021
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jdgarcia_pcie_gw_upgrade
50a05ff6
·
Change Tandem Boot BD name to shorten the resulting paths and avoid Windows crashes
·
Jul 04, 2021
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peter_210708_vitis
77c0c2f0
·
add submodule spec7-ps-sw
·
Aug 31, 2021
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spec7_golden
29aebff5
·
doc: remove empty document file
·
Sep 13, 2021
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Pascal_tooling_fix
7dd57950
·
removed retro spec tools, unconnected kernel-module submodule
·
Oct 01, 2021
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spec7_build
83b76038
·
Updated build script to enable a selection of the UBOOT uart channel
·
Oct 01, 2021
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flash_qspi_over_pcie_tool
b91e9536
·
added tool to flash QSPI over PCIe, still a WIP.
·
Oct 05, 2021
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peter_220224_irigb
6a962d43
·
add upgrade_ip statement in general vivado script
·
Feb 28, 2022
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Irig_b_enabled
b3788345
·
add upgrade_ip statement in general vivado script
·
Feb 28, 2022
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peter_sit5359
beda5e56
·
set precompiled to sit5359 wrpc-sw sources
·
Mar 01, 2022
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proposed_master
fa8c5124
·
some ps_pcie_tandem_boot ip blocks needed update to vivado 2021.2
·
Mar 23, 2022
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