# VCom_Functional.tcl
# compile for functional simulation
# From directory vcom -explicit -93 -work work ../../wr-cores/syn/spec7_ref_design
# hdlmake list-files > proj_file_list.txt

#vcom -explicit -93 -work work ../../top/spec7_ref_design/spec7_wr_ref_top.xdc
#vcom -explicit -93 -work work ../../top/spec7_ref_design/spec7_wr_hpsec_top.xdc

vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/common/gencores_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/genram_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wbgen2/wbgen2_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/wishbone/wishbone_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_sit5359_interface/sit5359_regs_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_sit5359_interface/sit5359_if_wb.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_sit5359_interface/wr_sit5359_interface.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_sit5359_interface/xwr_sit5359_interface.vhd

# Executing Vivado Block Design script:
# ../../ip/ps_pcie.bd
# results in many file that are genearted to instantiate this functionality.
# If a full simulation needs to be done including these Block Designs then Vivado can generate simulation files.
