- Nov 19, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Nov 17, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Nov 12, 2010
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Matthieu Cattin authored
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- Nov 11, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
Add 2 wishbone slave on CSR bus; Dummy_stat_regs with fixed values and the DEBUG switch state. Dummy_ctrl_regs with r/w regs and LEDs control.
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- Nov 08, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Nov 05, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Nov 04, 2010
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Matthieu Cattin authored
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- Nov 03, 2010
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Matthieu Cattin authored
Make packet payload size selectable and set it to 32 (x 32-bit words). Change c_L2P_MAX_PAYLOAD to c_MAX_READ_REQ_SIZE in p2l_dma_master.
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- Oct 29, 2010
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Matthieu Cattin authored
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- Oct 27, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Oct 25, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Oct 21, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Oct 20, 2010
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Matthieu Cattin authored
Fix bugs in DMA wishbone masters.
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Matthieu Cattin authored
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- Oct 19, 2010
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Matthieu Cattin authored
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- Oct 07, 2010
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Matthieu Cattin authored
Modify CSR wishbone address map, BAR0 + BAR2. Fix bug with LED. Fix bug wb slave clk is wb clk not core clk.
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- Oct 06, 2010
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Matthieu Cattin authored
Add clock input on wb bus of the core's top entity.
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Matthieu Cattin authored
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Matthieu Cattin authored
Lots of clean up in comments and layout.
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- Oct 05, 2010
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Matthieu Cattin authored
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Matthieu Cattin authored
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- Oct 01, 2010
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Matthieu Cattin authored
Check L2P channel status when sending data to GN4124.
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