- 13 May, 2020 2 commits
-
-
Tomasz Wlostowski authored
gc_simple_spi_master: keep MOSI at 0 when inactive so that multi-master SPI signals can be just ORed together
-
Tomasz Wlostowski authored
-
- 19 Apr, 2020 2 commits
-
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
gc_sync_ffs: revert commit d2b71b65. It breaks the timestamper unit in wr_endpoint!
-
- 16 Apr, 2020 1 commit
-
-
Tomasz Wlostowski authored
-
- 10 Apr, 2020 10 commits
-
-
Tomasz Wlostowski authored
wb_fine_pulse_gen: implement separate serdes/PLL reset and lock indicator (required to maintain correct phase of the output pulses)
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
- 09 Apr, 2020 3 commits
-
-
Maciej Lipinski authored
This generic is dummy (does nothing), yet it is needed since the generic component declaration in genram_pkg.vhd has such generic. It has it, because the xilinx generic_dpram.vhd has such generic and uses it. TBD whether we want to attempt at providing similar functionality for altera
-
Tomasz Wlostowski authored
wb_fine_pulse_gen: implement separate serdes/PLL reset and lock indicator (required to maintain correct phase of the output pulses)
-
Tomasz Wlostowski authored
-
- 03 Apr, 2020 1 commit
-
-
Dimitris Lampridis authored
-
- 01 Apr, 2020 2 commits
-
-
Tomasz Wlostowski authored
-
Tomasz Wlostowski authored
-
- 30 Mar, 2020 1 commit
-
-
Dimitris Lampridis authored
Reported by Olof Kindgren (@olofk). See also merge request !4. Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
- 26 Mar, 2020 6 commits
-
-
Dimitris Lampridis authored
1.0.4 - 2020-03-26 ================== https://www.ohwr.org/project/general-cores/tags/v1.0.4 Added ----- - [hdl] VHDL functions to convert characters and strings to upper/lower case. - [sw][i2c] Support for kernel greater than 4.7. - [hdl] Separate synchroniser and edge detection modules. - [hdl] 8b10b encoder. Changed ------- - [hdl] Rewritten the WB master interface used in simulations. - [hdl] Reimplement gc_sync_ffs using new synchroniser and edge detectors. Fixed ----- - [sw][spi] Align polarity and phase for Rx and Tx. - [hdl][i2c] Fix reset lock for I2C master. - [hdl] Avoid cyclic dependencies for log2 ceiling functions.
-
Dimitris Lampridis authored
-
Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
Dimitris Lampridis authored
Using the guidelines from here: https://gitlab.cern.ch/be-co-ht-documents/project-management-guidelines/-/blob/master/how-to-write-changelog.rstSigned-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
Tristan Gingold authored
-
Tristan Gingold authored
-
- 17 Mar, 2020 2 commits
-
-
Federico Vaga authored
Instead of check for version here and there, the main code always uses the latest API, and in a preprocessor ``if`` statement I implemented the compatibility layer. Like this it will be easier to apply patches from the kernel to our local driver Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
-
Federico Vaga authored
-
- 13 Mar, 2020 3 commits
-
-
Federico Vaga authored
-
Federico Vaga authored
-
Federico Vaga authored
sw: Update spi-ocores See merge request !3
-
- 11 Mar, 2020 1 commit
-
-
Tristan Gingold authored
-
- 06 Mar, 2020 4 commits
-
-
Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
Dimitris Lampridis authored
Also perform cleanup of sync and edge modules. Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
Tomasz Wlostowski authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-
- 05 Mar, 2020 2 commits
-
-
Tristan Gingold authored
-
Dimitris Lampridis authored
Signed-off-by: Dimitris Lampridis <dimitris.lampridis@cern.ch>
-