Commit c0e85653 authored by Maciej Lipinski's avatar Maciej Lipinski

[hdl] add missing generic to generic_dpram in altera

This generic is dummy (does nothing), yet it is needed since the
generic component declaration in genram_pkg.vhd has such generic.
It has it, because the xilinx generic_dpram.vhd has such generic
and uses it.
TBD whether we want to attempt at providing similar functionality
for altera
parent 6b394362
......@@ -43,6 +43,7 @@ entity generic_dpram is
g_with_byte_enable : boolean := false;
g_addr_conflict_resolution : string := "dont_care";
g_init_file : string := "none";
g_fail_if_file_not_found : boolean := true; -- dummy (exists in Xilinx/generic)
g_dual_clock : boolean := true);
port(
rst_n_i : in std_logic := '1'; -- synchronous reset, active LO
......
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