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Platform-independent core collection
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Platform-independent core collection
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57eafd4e
Commit
57eafd4e
authored
Mar 26, 2020
by
Tristan Gingold
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xilinx/generic_dpram_sameclock: remove unused signals.
parent
ad115623
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generic_dpram_sameclock.vhd
modules/genrams/xilinx/generic_dpram_sameclock.vhd
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modules/genrams/xilinx/generic_dpram_sameclock.vhd
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57eafd4e
...
...
@@ -123,9 +123,7 @@ architecture syn of generic_dpram_sameclock is
shared
variable
ram
:
t_ram_type
:
=
f_file_to_ramtype
;
signal
s_we_a
:
std_logic_vector
(
c_num_bytes
-1
downto
0
);
signal
s_ram_in_a
:
std_logic_vector
(
g_data_width
-1
downto
0
);
signal
s_we_b
:
std_logic_vector
(
c_num_bytes
-1
downto
0
);
signal
s_ram_in_b
:
std_logic_vector
(
g_data_width
-1
downto
0
);
signal
wea_rep
,
web_rep
:
std_logic_vector
(
c_num_bytes
-1
downto
0
);
...
...
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