In the past we used a generic to set the initial memory contents on altera.
Unfortunately, quartus compiles big generics slowly (read: hours).
Now we can load from a .mif file instead, which is much faster (seconds).
Thus, this old option is no longer needed.

genrams/xilinx/generic_dpram: made two separate versions for memories with both ports clocked with the same signal and with independent clocks

This is to prevent ISE from interpreting the single-clock template as a dual-clock one, which may result in read-after-write memory content corruption on Spartan-6/Virtex-6 FPGAs.

Tomasz Wlostowski authored 13 years ago and Tomasz Wlostowski committed 12 years ago

Genrams is a collection of synthesizable RAM/FIFO providing identical interface and features on different FPGA platforms.

Quartus will not process a 'file_open' call during synthesis,
so we can instead initialize the RAM with a vhdl constant.

This reverts commit ae005148.