- Sep 18, 2020
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The goal is to make sure that files in the common directory don't depend on things defined elsewhere. With these changes, the only remaining issue is gc_delay_line that uses generic_dpram from genrams Signed-off-by:
Olof Kindgren <olof.kindgren@gmail.com>
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- Sep 09, 2020
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gc_simple_spi_master: keep MOSI at 0 when inactive so that multi-master SPI signals can be just ORed together
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- May 11, 2020
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- May 04, 2020
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Tristan Gingold authored
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- Apr 24, 2020
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Dimitris Lampridis authored
The only reason for this is to improve readability and reduce the usage of gc_posedge/gc_negedge, in case we want to deprecate them in the near future. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Apr 23, 2020
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Apr 21, 2020
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Dimitris Lampridis authored
The main reason for doing this is so that all our sync modules are based directly on gc_sync (instead of using it indirectly through gc_sync_ffs). Another benefit of this is that the feedback loop of the pulse synchroniser will now be two clock cycles shorter (one input clock cycle + one output clock cycle), since gc_sync_ffs is using one more flip-flop compared to gc_sync. This will also reduce the number of warnings in various synthesis and simulation tools, since gc_pulse_syncrhonizer is also used by the gc_sync_word modules, as well as the async dual clock FIFOs. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This was recently introduced by T. Gingold and we both agreed that it is not really adding much value, as it can be easily replaced by the more versatile combination ofgc_sync + gc_edge_detect. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This is necessary in order to properly "emulate" the previous implementation of the gc_sync_ffs module. Furthermore, a "new" module has been introduced, the gc_edge_detect, which combines positive and negative pulse edge detection. gc_negedge and gc_posedge have been rewritten to use internally the new gc_edge_detect. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This is to avoid any confusion caused by g_SYNC_EDGE and g_EDGE generics used in gc_sync, gc_sync_ffs and gc_sync_edge modules. Also use capitals for generics as defined by our coding style. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Mar 30, 2020
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Dimitris Lampridis authored
Reported by Olof Kindgren (@olofk). See also merge request !4 . Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Mar 06, 2020
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Also perform cleanup of sync and edge modules. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Mar 05, 2020
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Tristan Gingold authored
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Dimitris Lampridis authored
Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
Reported by Olof Olof Kindgren (@olofk). See also merge request !4 . Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This allows them to be used right after in component declarations. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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Dimitris Lampridis authored
This is especially beneficial when trying to meet timing in the GN4124 core (on Spartan6), where the async FIFOs are clocked on one side at 200MHz. Apparently, the KEEP_HIERARCHY attribute makes it much easier for ISE 14.7 to reach timing closure. It also helps in general to ensure that the synchronisation structures remain intact and do not get merged in unpredictable ways with other parts of the design. Signed-off-by:
Dimitris Lampridis <dimitris.lampridis@cern.ch>
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- Mar 03, 2020
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Tristan Gingold authored
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Tristan Gingold authored
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- Feb 19, 2020
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Christos Gentsos authored
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Christos Gentsos authored
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- Jan 30, 2020
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Tristan Gingold authored
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Tristan Gingold authored
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- Dec 13, 2019
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Dimitris Lampridis authored
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- Sep 09, 2019
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Dimitris Lampridis authored
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- Aug 02, 2019
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Dimitris Lampridis authored
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- Aug 01, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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- Jul 29, 2019
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Dimitris Lampridis authored
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Dimitris Lampridis authored
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Dimitris Lampridis authored
Without this option, the two outputs of the module are in different clock domains. The frequency value is in the clk_in domain, while the "valid" flag is in the system clock domain. With the new option, if set to TRUE, both outputs will be in the system clock domain.
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Dimitris Lampridis authored
This commit does three changes to gc_sync_word_wr: 1. It converts it to use internally gc_pulse_synchroniser2 2. It introduces a new "busy" output bit 3. It introduces a new generic, g_AUTO_WR which instructs the core to write a new word continously, without input from the user.
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Dimitris Lampridis authored
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- Jun 19, 2019
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Tristan Gingold authored
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Tristan Gingold authored
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