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FMC DEL 1ns 2cha
Commit 9c53d4f4 authored by Jan Pospisil's avatar Jan Pospisil
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added version numbers (major.minor.rev); added clock_stable status bit

parent 6a062568
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hdl/ffpg/rtl/FfpgPkg.vhd
View file @ 9c53d4f4
...@@ -27,8 +27,9 @@ ...@@ -27,8 +27,9 @@
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html -- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
-- Revisions : -- Revisions :
-- Date Version Author -- Date Version Author Comment
-- 2016-08-24 1.0 Jan Pospisil -- 2016-08-24 1.0 Jan Pospisil
-- 2016-09-01 1.1 Jan Pospisil added version numbers (major.minor.rev)
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
library ieee; library ieee;
...@@ -39,6 +40,10 @@ use work.wishbone_pkg.all; ...@@ -39,6 +40,10 @@ use work.wishbone_pkg.all;
package FfpgPkg is package FfpgPkg is
constant VersionMajor: natural := 1;
constant VersionMinor: natural := 1;
constant VersionRevision: natural := 0;
type t_Ad5600Interface is record type t_Ad5600Interface is record
FrameSynchronization_n: std_logic; FrameSynchronization_n: std_logic;
SerialClock: std_logic; SerialClock: std_logic;
......
hdl/ffpg/rtl/FfpgSlave.vhd
View file @ 9c53d4f4
...@@ -31,8 +31,10 @@ ...@@ -31,8 +31,10 @@
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html -- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
-- Revisions : -- Revisions :
-- Date Version Author -- Date Version Author Comment
-- 2016-08-24 1.0 Jan Pospisil -- 2016-08-24 1.0 Jan Pospisil
-- 2016-09-01 1.1 Jan Pospisil added version numbers (major.minor.rev)
-- added clock_stable status bit
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
library ieee; library ieee;
...@@ -356,6 +358,8 @@ begin ...@@ -356,6 +358,8 @@ begin
SenseFrequency_ob => WbRegsInput.frequency_i, SenseFrequency_ob => WbRegsInput.frequency_i,
SenseFrequencyStable_o => ClkRfStable SenseFrequencyStable_o => ClkRfStable
); );
WbRegsInput.status_input_clock_stable_i <= ClkRfStable;
---------------------------------- ----------------------------------
-- debug -- debug
...@@ -363,4 +367,12 @@ begin ...@@ -363,4 +367,12 @@ begin
WbRegsInput.debug_i(31 downto 6) <= (others => '0'); WbRegsInput.debug_i(31 downto 6) <= (others => '0');
----------------------------------
-- Version information
----------------------------------
WbRegsInput.version_major_i <= to_unsigned(VersionMajor, WbRegsInput.version_major_i'length);
WbRegsInput.version_minor_i <= to_unsigned(VersionMinor, WbRegsInput.version_minor_i'length);
WbRegsInput.version_revision_i <= to_unsigned(VersionRevision, WbRegsInput.version_revision_i'length);
end architecture; end architecture;
hdl/ffpg/wb_gen/ffpg_csr.wb
View file @ 9c53d4f4
...@@ -80,6 +80,15 @@ peripheral { ...@@ -80,6 +80,15 @@ peripheral {
access_bus = READ_ONLY; access_bus = READ_ONLY;
access_dev = WRITE_ONLY; access_dev = WRITE_ONLY;
}; };
field {
name = "Input clock stable";
description = "Indicates the stability of the input clock.\n0: input clock not present or not stable\n1: input clock present and stable";
prefix = "input_clock_stable";
type = BIT;
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
}
}; };
reg { reg {
...@@ -314,6 +323,39 @@ peripheral { ...@@ -314,6 +323,39 @@ peripheral {
access_dev = WRITE_ONLY; access_dev = WRITE_ONLY;
}; };
}; };
reg {
name = "Gateware version";
prefix = "version";
description = "Version of the current gateware in form of major.minor.revision";
field {
name = "Revision";
prefix = "revision";
type = UNSIGNED;
size = 12;
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
};
field {
name = "Minor version";
prefix = "minor";
type = UNSIGNED;
size = 10;
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
};
field {
name = "Major version";
prefix = "major";
type = UNSIGNED;
size = 10;
access_bus = READ_ONLY;
access_dev = WRITE_ONLY;
};
};
ram { ram {
name = "CH1 SET serial stream"; name = "CH1 SET serial stream";
......
sw/FFPG_driver.py
View file @ 9c53d4f4
...@@ -30,8 +30,10 @@ ...@@ -30,8 +30,10 @@
## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html ## source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
##----------------------------------------------------------------------------- ##-----------------------------------------------------------------------------
## Revisions : ## Revisions :
## Date Version Author ## Date Version Author Comment
## 2016-08-24 1.0 Jan Pospisil ## 2016-08-24 1.0 Jan Pospisil
## 2016-09-01 1.1 Jan Pospisil added version numbers (major.minor.rev)
## added clock_stable status bit
##----------------------------------------------------------------------------- ##-----------------------------------------------------------------------------
# TODO: proper BUSY bits checking # TODO: proper BUSY bits checking
...@@ -307,6 +309,7 @@ def Status(): ...@@ -307,6 +309,7 @@ def Status():
PrintBit(status, 5, 'Channel 2 output', 'enabled', 'disabled') PrintBit(status, 5, 'Channel 2 output', 'enabled', 'disabled')
PrintBit(status, 6, 'Channel 1', 'running', 'stopped') PrintBit(status, 6, 'Channel 1', 'running', 'stopped')
PrintBit(status, 7, 'Channel 2', 'running', 'stopped') PrintBit(status, 7, 'Channel 2', 'running', 'stopped')
PrintBit(status, 8, 'Input clock stability', 'stable', 'not stable/present')
def Control(): def Control():
print('Control register: ') print('Control register: ')
...@@ -353,7 +356,14 @@ def Debug(): ...@@ -353,7 +356,14 @@ def Debug():
debug = WbRead('debug') debug = WbRead('debug')
PrintBits(debug, 0, 2, "CH1 FSM state", ("Stop", "WaitForTrigger", "Generating", "Outputting")) PrintBits(debug, 0, 2, "CH1 FSM state", ("Stop", "WaitForTrigger", "Generating", "Outputting"))
PrintBits(debug, 3, 5, "CH2 FSM state", ("Stop", "WaitForTrigger", "Generating", "Outputting")) PrintBits(debug, 3, 5, "CH2 FSM state", ("Stop", "WaitForTrigger", "Generating", "Outputting"))
def Version():
version = WbRead('version')
major = (version >> 22) & ((2**10)-1)
minor = (version >> 12) & ((2**10)-1)
revision = version & ((2**12)-1)
print('Gateware version: '+str(major)+'.'+str(minor)+'.'+str(revision))
################################################################### ###################################################################
## OneWire stuff - not working yet ## OneWire stuff - not working yet
################################################################### ###################################################################
......
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