Programming languages used in this repository
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VHDL
61.45 %
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SystemVerilog
20.45 %
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Python
12.98 %
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C
3.11 %
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Verilog
1.94 %
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Makefile
0.08 %
Commit statistics for master Jun 28 - Sep 14
- Total: 191 commits
- Average per day: 0.4 commits
- Authors: 1
Commits per day of month
Commits per weekday
Commits per day hour (UTC)