The timetag core is meant to be shared between different carriers.

The ip_cores dir is meant to be shared between different carriers.

The new module contains another wb crossbar. Therefore the memory
mapping has changed.
This has been done for the future svec design with two fmc slots.

This solves the problem of trigger firing even when the data was below the threshold.

Now the figures dir is common to all doc.

In multi-shot mode, this was causing the end_acq not to be generated
for single sample acquisitions.

Also fix the number of samples taken in multi-shot mode.
total = 1 (trigger) + pre_trig + post trig.