Tested and working features
Feature |
Status |
Comments |
Voltage levels (IRPS5401 configuration) |
OK |
|
Boot from Jtag |
OK |
|
Boot from QSPI Flash |
OK |
Required PCB fixes (#232 (closed), #233 (closed)) |
Boot from SD card |
OK |
Required PCB fixes (#234 (closed), #235 (closed)) |
PS DDR4 with ECC |
OK |
Boots U-boot and Petalinux |
PS I/Os (User LED2, I2C) |
OK |
|
PS & PL UART (CP2105) |
OK |
|
I2C mux |
OK |
|
Clock generator (Si5341) |
OK |
Programmed to generate 62.5MHz/125MHz WR clocks in zero-delay mode) |
WR helper clock |
OK |
Required PCB fixes (#236 (closed)) |
WR synchronization |
OK |
Ported WR PTP Core |
SFP GTH |
OK |
IBERT confirms well opened eye for 5Gbps and 12.5Gbps
|
Tested and not working features
Nothing here for now
Not tested yet
Feature |
Comments |
PL DDR4 |
|
I2C WR EEPROM and unique ID |
|
I2C thermometers |
|
eMMC |
|
Backplane GTH |
IBERT analysis |
FMC GTH |
IBERT analysis |