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DIOT Zynq Ultrascale-based System Board
DIOT Zynq Ultrascale-based System Board
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  • DIOT Zynq Ultrascale-based System BoardDIOT Zynq Ultrascale-based System Board
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  • #235

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Opened Apr 09, 2021 by Grzegorz Daniluk@greg.d
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fpga-ps-mio: PESD3V3S4UD (D11, D12) has too high capacitance which disrupts SDIO clock making the board unable to boot from SD card

It's 300pF according to the datasheet. We should use another ESD protection with lower capacitance. Also ESD protection for backplane I2C should be changed for the System Board and Peripheral Boards as currently used PESD3V3S4UD would greatly impact the I2C rise time.

Edited Apr 09, 2021 by Grzegorz Daniluk
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Reference: project/diot-sb-zu#235