Tested and working features
| Feature | Status | Comments |
|---|---|---|
| Voltage levels (IRPS5401 configuration) | OK | |
| Boot from Jtag | OK | |
| Boot from QSPI Flash | Fixed | Required PCB fixes (#232 (closed), #233 (closed)) |
| Boot from SD card | Fixed | Required PCB fixes (#234 (closed), #235 (closed)) |
| PS DDR4 with ECC | OK | Boots U-boot and Petalinux |
| PS I/Os (User LED2, I2C) | OK | |
| PS & PL UART (CP2105) | OK | |
| I2C mux | OK | |
| Clock generator (Si5341) | OK | Programmed to generate 62.5MHz/125MHz WR clocks (in zero-delay mode) |
| WR helper clock | Fixed | Required PCB fixes (#236 (closed)) |
| WR synchronization | OK | Ported WR PTP Core |
| SFP GTH | OK | IBERT confirms well opened eye with loopback SFP for 5Gbps and 12.5Gbps |
| I2C WR EEPROM and unique ID | OK | |
| PS_ON self-power cycle circuit | OK | However the time constant could be increased as now it's a bit too short for 12V to fully drop (see the graph) |
| PL DDR4 | OK | MT40A512M16LY-075E is not available in MIG configuration, choose MT40A512M16HA-075E instead (which is the same memory, just different package) MIG selftest and calibration Vitis memtest |
| Backplane GTH | OK | Tested for 8Gbps and 12.5Gbps |
| eMMC | OK | Board boots from eMMC |
| FMC GTH0..3 | OK | IBERT eye open for 12.5Gbps |
| FMC GTH4..7 | OK | Consider improving routing (#239 (closed)) |
| I2C thermometers (LM75A, MAX6639) | OK |
Tested and not working features
Nothing here for now
Not tested yet
Nothing left