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DIOT Zynq Ultrascale-based System Board
DIOT Zynq Ultrascale-based System Board
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Files

Last edited by Grzegorz Daniluk Jun 22, 2020
Page history

Documents for v0.1 layout review

  • Compressed Altium project

(obsolete) Documents for v0.2 schematics review

  • Compressed Altium project
  • Schematics pdf
  • Bill Of Materials

Changelog comparing to v0.1

  • sch/Cpcis_connectors_P1_P2_P3.SchDoc - added red text about lines cross-over in the backplane
  • sch/Cpcis_connectors_P4_P5_P6.SchDoc - added red text about lines cross-over in the backplane
  • sch/fpga-bank-87-88.SchDoc - added watchdog to drive PS_ON#, common DCXO_OE for Main_DCXO and Helper_DCXO (not used by CERN)
  • sch/power-supply-3.SchDoc - components rearranged, no technical change

(obsolete) Documents for v0.1 schematics review

  • Compressed Altium project
Clone repository
  • Backplane gth ibert analysis
  • Board specification
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